本論文針對不同之處理改善氧化鋁(Al2O3)/砷化銦(InAs)之金氧半電容元件(Metal-oxide-semiconductor capacitor, MOS-Cap)之元件特性進行探討。透過三甲基鋁(Try-methyl-aluminum, TMA)前置處理搭配氨水(NH4OH)化學處理,在X射線光電子能譜分析中發現,成功有效的降低砷化銦之原生氧化物比例。再引入硝酸後氧化處理與沉積後退火處理後,有效減少了氧化層內之邊緣缺陷(Border trap),降低累積區頻散現象,並透過引入金屬後退火製程,改善費米能階釘札現象與磁滯現象。完成之元件,累積區頻散率為 1.42 %/dec、電容調變率為 31.4 %,與磁滯電壓變化為 150 mV。 透過累積區頻散之等效電路模型,我們成功擬合累積區之頻散電容,並且從中擬合出氧化層電容 COX;藉由擬合之氧化層電容,我們可由 G-V 求得室溫下最低之介面缺陷密度為 1.77*10^13 /eV*cm^2。在 5.3 奈米之等效氧化層厚度下,閘極電壓 ±1 V 內維持 2×10^-8 A/cm^2 低漏電流密度特性。
In this study, we use different treatments to improve the characteristic Metal-oxide-semiconductor capacitor (MOS-Cap) of Al2O3 on InAs. We applied the Try-methyl-aluminum (TMA) pretreatment plus NH4OH chemical treatment before oxide growth, and the native oxide was effectively reduced, which is confirmed by XPS. We also applied the HNO3 post oxidation and post deposition annealing, and the border trap in oxide was effectively reduced and the accumulation frequency dispersion was suppressed. Then, we applied post metal annealing to improve the Fermi level pinning effect and hysteresis effect. Finally, the accumulation frequency dispersion value, the capacitance modulation, n-factor, and the hysteresis voltage of our device are 1.42 %/dec, 31.4 %, 0.14 and 150 mV. By using the effective circuits of border trap, we can fit our capacitance in accumulation and fit our oxide capacitance. The interface trap density of 1.12×10^13 /eV*cm^2 was extracted by using the fitting oxide capacitance and G-V method. The low leakage current density of 2×10^-8 A/cm^2 at ±1 V was also obtained.