低溫控制及高電流密度對覆晶封裝與其界面反應之影響

Studies of Flip Chip Packages and Interfacial Reactions under Extra-high Current Density Tests with Low-temperature Control

柯佳宏(Jia-Hong Ke)

指導教授 ： 高振宏

國立臺灣大學/工學院/材料科學與工程學研究所/碩士(2009年)

https://doi.org/10.6342/NTU.2009.10031

摘要

電子元件縮小的趨勢將導致內部通電結構電流密度的提升，使得元件中電遷移的現象將不容忽視。覆晶封裝由於其特殊的幾何結構，及涉及異質金屬間的界面反應，其電遷移效應遠比一般金屬導線複雜許多；因此，近年來電遷移對覆晶封裝的影響一直是個非常重要的研究主題。
過去對於覆晶封裝的電遷移研究大都是在103至104A/cm2的電流密度進行，之所以無法測試更高電流密度的條件是因為Al導線於高電流密度下在短時間內會先斷路失效，使研究者無法觀察到高電流密度長時間對覆晶封裝的影響。另一方面，過去的研究主要集中在高溫（120℃以上）之通電加速測試；然而，電遷移對覆晶封裝中異質金屬的影響包含多種擴散機制，而不同擴散機制受溫度影響程度之差異將導致過去高溫之加速測試無法完整呈現覆晶封裝在一般使用溫度下的可靠度。因此，「低溫」與「高電流密度」這個過去極少見的實驗條件對於覆晶封裝的影響值得深入研究。
本研究藉由散熱裝置將晶片側端溫度固定在60℃的低溫，並改以不同的高電流密度（5.5×104、5.0×104、4.5×104 A/cm2）進行加速測試，探討在此特殊條件下對覆晶封裝及其界面反應的影響。
本論文分兩大部分，第一部分為界面反應與電遷移相關的理論與文獻回顧。首先將以熱力學及動力學的角度完整地回顧界面反應理論，其中包括過去數個反應擴散的動力學模型，及它們在應用上的限制。之後將呈現電遷移驅動力如何影響界面反應，及相關的動力學表示方式。最後則是電遷移在覆晶封裝中常見的失效機制，包括孔洞的生成與延伸，以及UBM層的消耗。
第二部分則是本人於碩士期間的研究成果與討論。本研究所使用之覆晶封裝為NiV(3.25k)/Cu(8k)/Sn-0.7Cu/Cu與Ni(2μm)/Sn-2.6Ag/Cu的結構。在低溫的通電實驗結果發現界面上不易有高溫通電常見的孔洞形成，即使在極高的電流密度條件下；取而代之的現象是介金屬在覆極端大量的溶解，以及正極端介金屬的生成與累積。此結果顯示在不同的溫度下，覆晶封裝的電遷移現象有所差異：高溫通電易導致高活化能之擴散機制顯現，如Sn自擴散造成的孔洞；而低溫通電則易導致低活化能之擴散機制顯現，如Cu在Sn擴散引起的負極端介金屬溶解，在本論文討論的章節中將對此提出動力學上的分析。此外，本研究也發現通電使得負極端界面上無法提供形成平整界面形貌的條件，尤其當負極端的Cu逐漸因介金屬的溶解而失去介金屬的保護時。

關鍵字

電遷移 ； 覆晶封裝 ； 界面反應 ； 介金屬 ； 無鉛焊料

並列摘要

The miniaturization of electronic devices always accompanies the rise of interconnect current density, which makes the subsequent electromigration phenomenon cannot be ignored. Flip chip technology has now been widely used in packaging industry; because of its unique geometry and its involvement in interfacial reactions, electromigration effects in flip chip solder joints are far more complicated than that in Cu and Al interconnects. Therefore, electromigration in flip chip solder joints has been a crucial issue in recent years, and more emphasis will be put on this special topic.
Because extra-high current density in flip chip solder joints always results in immediate failure at Al trace, mostly the applied current density in flip chip solder joints seldom exceeded 104A/cm2 in previous studies. Further, the accelerated electromigration tests in previous studies were usually conducted under high temperature conditions (above 120oC); however, the effects of electromigration on flip chip solder joints involve several diffusion mechanisms, and different diffusion mechanisms demonstrate different dependences on temperature. Subsequently, the accelerated electromigration tests in previous studies under high temperature could not thoroughly demonstrate the reliability of flip chip under normal usage temperature. Therefore, low temperature and extra-high current density are special conditions which were seldom tried in the past, but indeed worth the investigation.
In this research, a cooling system with a PID controller was applied in order to fix the chip temperature at 60oC, and different extra-high current density (5.5×104 A/cm2、5.0×104 A/cm2、4.5×104 A/cm2) was used for accelerated electromigration tests. The objective of the research is to investigate the effects of low temperature and extra-high current density on flip chip solder joints and their interfacial reactions.
This thesis consists of two parts. The first part concerns the literature reviews of interfacial reaction and electromigration physics. First, interfacial reaction and diffusion are thoroughly reviewed from a thermodynamic and kinetic point of view, which include several reaction diffusion theories and kinetic models, their limitations and applications. Next, electromigration driving force and its effects on interfacial reactions are introduced. Finally, two common electromigration-induced failure mechanisms of flip chip solder joints are discussed, which are “void formation-and-propagation” and “UBM consumption”.
The second part concerns experimental details, results, and discussion of this research. The two configurations of flip chip solder joints used in this research are NiV(3.25k)/Cu(8k)/Sn-0.7Cu/Cu and Ni(2μm)/Sn-2.6Ag/Cu structure. And the experimental results showed that low temperature could retard void formation in solder joints (which is a usual phenomenon under high temperature tests), even under extra-high current density tests; Instead, evident IMC dissolution at the cathode and accumulation at the anode was observed. The results implicate that electromigration in flip chip solder joints under different temperature conditions would result in different phenomenon: high temperature electromigration tests would make diffusion with higher activation energy more observable, such as Sn self-diffusion and subsequent void formation in solder; low temperature would make diffusion with lower activation energy more observable, such as Cu diffusion in Sn and subsequent IMC dissolution at the cathode (in this thesis a kinetic model will be suggested). Moreover, especially when IMC was totally consumed by electromigration, interfacial reaction at the cathode could not guarantee the planar interface because Cu was not protected by IMC anymore.

並列關鍵字

electromigration ； flip chip ； interfacial reaction ； intermetallic compound ； lead-free solder

參考文獻

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