在電源與接地面間加去耦合電容抑制接地彈跳雜訊為一般常見的作法,但往往侷限於電容本身接腳的電感性,使電容在GHz以上便失去抑制的效果,而電磁能隙結構是一種被提出用來抑制高頻接地彈跳雜訊新的方法。 電磁能隙結構主要是利用週期性結構所產生的禁止頻帶抑制雜訊,而週期性結構使的參考平面不在是一個完整平面,平面上因為槽線,產生信號完整性和電磁相容的問題。由於差模信號具備有低雜訊產生與抑制共模雜訊的能力,本論文中將利用差模信號佈局在LPC-EBG結構上,探討耦合係數的影響,及適當位置的差模信號佈局,達到抑制高頻接地彈跳雜訊,並降低因槽線所引發信號完整性和電磁相容的問題。
Adding decoupling capacitors between the power and ground planes is a typical way to suppress the ground bounce noise(GBN). However, they are not effective at the higher frequency than GHz due to their inherent lead inductance. In recent, a new method for eliminating the GBN at higher frequency is proposed by electromagnetic bandgap structure. To make use of period structure main of EBG, it produces the stopband to suppress the noise. But the reference plane of period structure is not a solid plane, it produces problems on Signal Integrity (SI) and Electromagnetic Compatibility (EMC) because of the slot of the plane. The differential signals have ability on producing low noise and suppressing common noise. In this paper, we discuss the influence of differential coupling coefficient and appropriate layout to design differential signals. Accomplish the purpose of eliminating the GBN at higher frequency, and reduce the Signal Integrity and Electromagnetic Compatibility from the slot of LPC-EBG structure.