- 學位論文
皺紋型矽鍺薄膜之電洞傳輸行為
Hole Transport Characteristic Of Wrinkling SiGe Thin Film
摘要
由於現今製程已邁向奈米時代，目前的金氧半場效電晶體在邁入後奈米時代時所遭遇之量子化現象也越來越嚴重。國際半時導體技術藍圖研討會在2005年時預測現有製程到達2019年，線寬將會小到16奈米，現有的CMOS技術將不敷使用，為了因應摩爾定律，未來可能取而代之的元件可能會是奈米碳管、共振式穿隧元件、單電子電晶體、原子或自旋電子元件，而本篇論文將提出一種新穎結構製作電子元件，以期望能夠突破目前元件製作之難題。 皺紋型矽鍺薄膜是一種新穎的結構，目前對其特性還尚未了解，我們期望這種結構能夠在半導體元件上有所應用。 在這篇論文中，我們會對於應變矽鍺之異質結構為基礎，對此結構進行不同溫度的電性量測，進一步的利用nextnano3來模擬此結構的能帶特性，，並且推敲形成皺紋以後電洞的傳輸路徑以及行為 在這論文中有五個章節: 第一章: 奈米研究以及半導體工業對現今世界的影響。 第二章: 本論文相關的理論。 第三章: 雙層皺紋型矽鍺薄膜之製作方式。 第四章: 電性量測與實驗分析。 第五章: 未來展望與工作。
並列摘要
Until today, gate length of MOSFET have scaled down to nano-scale. As semiconductor process keep regenerating, ITRS predict that the channel length will smaller than sixteen nano. Process technologic followed technic of nowadays will not keep scaling down. In order to follow Moor’s law, nano carbon tube, resonant tunneling device, spin FET, atomic or spin electronic device will be a solution to this problem. This paper propose a novel structure becoming electronic device to solve this problem. Wrinkling SiGe thin film is a novel structure. So we don’t have too much about this structure. But we anticipate that this structure will be applied to semiconductor device. Based on strained SiGe heterostructure, we estimate I-V characteristic of wrinkling sample in deferent temperature in this paper. Furthermore, we us nextnano3 to calculate the band structure of wrinkling sample and reason the path of hole transport out. There are five chapters in this paper: Chapter 1: How research about nano technology and semiconductor industry affect this world. Chapter 2: Theorems about this experiment. Chapter 3: Process Si1-xGex/Si1-yGey wrinkling sample. Chapter 4: I-V measurement about wrinkling sample and reason the path of hole transport out Chapter 5: Future work.
參考文獻
延伸閱讀
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