一般連線結構之表面積分阻抗萃取方法

Surface Integral Impedance Extraction for General Interconnect Structure

賴俊穎(Chun-Ying Lai)

指導教授 ： 鄭士康

共同指導教授 ： 張耀文(Yao-Wen Chang)

國立臺灣大學/電機資訊學院/電信工程學研究所/碩士(2004年)

https://doi.org/10.6342/NTU.2004.00207

摘要

在深次微米設計中，當操做頻率到達數千赫茲時，晶片上面的電感效應已經不能再被忽略。因此，如何去精確地萃取出來連線結構的阻抗跟電感值變得十分重要。大部份以前的阻抗跟電感萃取著重在矩形切割的研究上，但是隨著時代的進步，有釵h非一般性結構的晶片，例如X-結構與Y-結構連線結構已經被發表出來或是可以提供製造。很明顯一般的矩形切割方式對於這些特殊的連線結構已經不敷使用，所以在這篇論文中，我們提出了一個用三角形切割方式配合面積分方法來處理阻抗萃取問題，最後我們會跟這方面有名的軟體來做驗証，証明我們方法的正確性以及較多的彈性。

關鍵字

阻抗萃取 ； 電感 ； 表面積分 ； 連線

並列摘要

As the operation frequency reaches gigahertz in very deep-submicron designs, the effect of on-chip inductance on circuit performance can no longer beneglected. Therefore, it is desired to extract interconnect impedance and inductance accurately. Most of the previous works on
impedance and inductance extraction are based on rectangular discretization which has been shown effective for the classical Manhattan based IC interconnect tructures. As technology advances, however, more general IC interconnect structures, such as the X-based and Y-based interconnect structures, have been introduced or even already in production. Those general interconnect structures allow wires to be routed with non-Manhattan shapes. For the non-Manhattan interconnect structures, rectangular discretization is obviously not sufficient. In this thesis, the author proposes to use the surface integral formulation with triangular discretization to extract impedance and inductance for the general IC interconnect structures. Comparative studies with the famous FastHenry, FastImp, and IE3D programs show that this approach is flexible and effective.

並列關鍵字

Surface ； Integral Extraction ； Interconnect ； Inductanc

參考文獻

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