矽基量子點元件製作與特性分析

Device Fabrication and Characterization of Si-based Quantum Dots

姜志穎(Chih-Ying Chiang)

指導教授 ： 李峻霣

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2021年)

https://doi.org/10.6342/NTU202103548

摘要

量子運算利用了量子位元的疊加性與纏結性，此兩項好處使得量子運算能在未來解決傳統電腦無法處理的複雜問題。半導體異質結構所形成的量子點最常作為量子運算元件的平台，透過量子點內所侷限出的單一電子，利用電子的自旋態即可在量子點中實現量子運算。在半導體材料中，因為矽金氧半與矽/矽鍺異質結構中核自旋干擾較小，且在製程上與傳統的積體電路製程相容，因此受到許多研究團隊的矚目。本論文因此針對矽金氧半與矽/矽鍺異質結構所製作的量子點進行深入研究。
我們製作了四種不同閘極結構的量子點元件，這些閘極能調控量子點周遭的靜電位，進而影響電子在量子點中的侷限行為。在低溫下(30 mK ~ 1.5 K)以交流訊號量測通過量子點的電導率，藉此分析電子的傳輸行為。我們成功地從量測中觀察到庫侖阻斷以及庫侖菱形等交流特性，代表電子在量子點中形成了不連續的能階，同時能藉由電極偏壓精準地控制這些能階分布的高低變化。在更低溫(30 mK)測量交流電性時，庫侖振盪的峰形與庫侖菱形的邊界都變得更清楚，這代表熱效應被抑制了。然而庫侖菱形的邊界仍然不夠清晰，其成因可能是在元件的閘極氧化層內部，或是在氧化層與矽的介面上所含的電荷缺陷導致的。因此，我們透過電容-電壓的曲線分析，針對元件內幾種可能的電荷缺陷進行探討。我們發現氧化層與氧化層介面間殘留過多的固定氧化層電荷。除此之外，若以氧化鋁為首層的閘極介電質製作元件，則元件特性同時會受到陷阱電荷所干擾。論文中亦針對電荷缺陷過多提出幾種可能的原因。

關鍵字

量子運算 ； 量子點 ； 庫侖阻斷 ； 庫侖振盪 ； 庫侖菱形 ； 氧化層缺陷

並列摘要

By merit of superposition and entanglement for qubits, quantum computation is a promising candidate for certain complex problems which cannot be solved by classical computers. The spin of an electron confined in a semiconductor quantum dot can be used to realize quantum computation. Among all semiconductor materials, Si MOS and Si/SiGe heterostructures are promising due to the reduced nuclear spin decoherence and their CMOS compatibility. Therefore, the quantum dots in Si MOS or SiGe is investigated in this thesis.
We fabricated four different structures of quantum dot devices with top gates to modulate the potentials for the confinement of electrons. The AC conductance technique in low temperature (30 mK ~ 1.5 K) is used for the characterization of electron transport in the quantum dots. Coulomb blockade and coulomb diamonds are successfully observed, which shows the precise control of the discrete energy levels in quantum dots. By varying the temperature from 1.5 K to 30 mK, the shape of oscillation peaks and the boundaries of diamonds becomes sharper owing to the reduction of thermal noise. However, the edges of the diamonds in the charge stability diagram are still lousy, which could be attributed to the charge traps in the oxide or oxide/Si interface. Thus, we investigate different types of charge traps for the quantum dot devices by C-V characteristics. The results show that many fixed oxide charges are located at the oxide/oxide interface due to the processes of multiple gate stacks. Moreover, if using Al2O3 as the first gate oxide in devices, their characteristics could be affected by the trap charges. Several possible reasons leading to the high trap densities are also discussed in the thesis.

並列關鍵字

quantum computation ； quantum dot ； coulomb blockade ； coulomb oscillation ； coulomb diamond ； oxide trap

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