無線網路接收機前端及互補式金氧半射頻電路設計

RF CMOS Circuit and Receiver Front-End Architecture Designs for Wireless Network

侯鈞豑(Chun-Chih Hou)

指導教授 ： 汪重光

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2004年)

https://doi.org/10.6342/NTU.2004.00329

摘要

本論文討論了下列CMOS製程裡的被動元件：電阻、電容、及電感。並以0.18mm 1P6M CMOS實現了：螺旋電感測試鍵、低雜訊放大器、混波器及壓控震盪器。主要適用的系統是IEEE 802.11a WLAN。
系統方面，針對IEEE 802.11a接收機前端推求從BPF至ADC所需的電路要求。並設計了低雜訊放大器、混波器、壓控震盪器及除頻器的電路，所占晶片面積為6.06 mm2。又針對IEEE 802.15.4的系統要求設計了低必v的低雜訊放大器和混波器。
一個結合了1/5 IF及1/2 IF的雙頻WLAN接收機架構被提出。適用於IEEE 802.11a/b/g，有高整合度，及低成本的優點。其雙頻低雜訊放大器和混波器以0.18mm 1P6M CMOS實現並驗證之。其混波器加入了新提出的電路，可防止在1/2 IF的架構中，低頻的flicker noise被轉頻到訊號所在的頻帶裡。

關鍵字

雙頻 ； 壓控振盪器 ； 互補金氧半 ； 混波器 ； 除頻器 ； 802.15.4 ； 802.11a/b/g ； 螺旋電感 ； 無線區域網路 ； 低雜訊放大器

並列摘要

The object of this research is to develop the RF CMOS circuits and receiver front-end architectures for wireless communications. In RF circuits, passive components including resistors, capacitors, varactors, and inductors are very crucial, and will be discussed respectively. A spiral inductor test-key is designed and measured, and a wide-band model is used to fit its RF characteristics. A voltage control oscillator (VCO) using a symmetric spiral inductor is also designed and measured. The coupling characteristic of inductors is discussed by the testing results of a 5.7-GHz low noise amplifier (LNA). The key function blocks in the RF part of a receiver chain are the LNA and mixer. Both will be discussed and designed in 0.18mm CMOS technology respectively. One mixer was fabricated. The measured results are used to verify the design.
People obtain more convenience and efficiency from wireless communication than wired communication. The IEEE Standards Committee draws up several standards of Wireless Local Area Network (WLAN) for this purpose. The Std. 802.11a/b/g are targeted at the application of internet and video stream access. The detailed specifications of IEEE 802.11a will be derived, including the linearity, noise, gain budget, filtering, and ADC requirements. The complete RF receiver chain, including the LNA, mixers, VCO, frequency divider, and buffer are designed. The total power consumption is 96 mW under 1.8-V supply voltage. The layout area, including the pads, is 6.06 mm2, using 0.18mm CMOS 1P6M process.
A receiver that can process two signal bands, called dual-band receiver, is a trend in WLAN markets because of its compatibility and convenience. An RF front-end of dual-band receiver is proposed. Its two components, dual-band LNA and mixer, are designed and taped out. Technology of 0.18mm CMOS 1P6M is used, and the chip occupies an area of 1.76 mm2. The supply voltage is 1.8 V, drawing a power of 24 mW.
Besides WLAN, the circuits for Wireless Personal Area Network (WPAN), which is for low power and low cost applications in home automation and networking, are also designed. Low voltage and low power LNA and mixer are discussed and simulated. The power consumption is less than 4 mW, and all the physical specifications meet the IEEE 802.15.4 standard.

並列關鍵字

zig-bee ； dual-band ； divider ； WLAN ； 802.11a/b/g ； CMOS ； VCO ； 802.15.4 ； mixer ； LNA ； spiral inductor

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