水平式砷化銦奈米線金氧半場效電晶體的製程與量測

Fabrication and Measurement of Lateral InAs Nanowire MOSFETs

李維晉(Wei-Jin Li)

指導教授 ： 毛明華

國立臺灣大學/電機資訊學院/光電工程學研究所/碩士(2018年)

https://doi.org/10.6342/NTU201800442

摘要

在本論文中，我們製作出水平式奈米線金氧半場效電晶體結構。奈米線是以分子束磊晶法成長，然後我們採用電子束微影技術在奈米線上定義數百奈米的閘極長度，並透過原子層沉積技術成長10 nm氧化鋁作為閘極氧化層；反應式離子蝕刻機將接觸電阻區的氧化鋁移除；電極方面則是利用電子束熱蒸鍍機鍍上30nm鈦/80 nm金。
為了改善元件電特性，我們以氨水或硫化銨溶液濕蝕刻除去奈米線原生氧化層，完成電極後並用420℃快速熱退火來降低接觸電阻。電性量測上，我們分別研究濕蝕刻除去原生氧化層與熱退火所帶來的影響，其中引用傳輸線法來分析接觸電阻，並與文獻進行比較。電晶體特性的部分，我們發現閘極明顯關不住，推測可能是閘極結構和表面能階導致閘極控制力不足，並利用改變閘極切換速率證實奈米線的確存在表面能階。最後探討未來該如何改變製程技術才能使奈米線電晶體的電特性有進一步提升。

關鍵字

水平式 ； 砷化銦 ； 奈米線 ； 電晶體 ； 傳輸線法

並列摘要

In this thesis, we have fabricated the lateral InAs nanowire metal-oxide-semiconductor field-effect transistors. The nanowires are grown by molecular beam epitaxy. We use electron beam lithography to define gate length in hundreds of nanometers, and use atomic layer deposition technology to grow 10 nm Al2O3 as gate oxide. The reactive ion etching removes the aluminum oxide in the contact area. The electrode is composed of 30 nm Ti / 80 nm Au by electron beam evaporation.

In order to improve the electrical properties of the device, we use wet etching with ammonia solution or ammonium sulfide solution to remove the nanowire native oxide layer. After the electrode is completed and the rapid thermal annealing at 420 ℃ is used to reduce the contact resistance. In the electrical measurement, we study the effect of wet etching on the native oxide layer and the thermal annealing, respectively. The transmission line method is used to analyze the contact resistance and the results are compared with those in the literature. In the part of the transistor characteristics, we found that the transistors obviously could not turn off. It is speculated that the gate structure and the surface states may lead to insufficient gate control force. The change of the gate switching rate confirms the existence of the surface states of the nanowires. Finally, we discuss how to modify processing technologies in order to improve the electrical properties of nanowire transistors in the future.

並列關鍵字

Lateral ； InAs ； Nanowire ； FET ； TLM

參考文獻

[3] 呂翰凱, “矽(111)基板上垂直式砷化銦奈米線兩端元件之製作與電性研究” , 國立台灣大學碩士論文 (2017)

[37] 蔡松澔, “聚焦離子束系統輔助砷化銦奈米線歐姆接觸與金氧半場效應電晶體製作”, 國立台灣大學碩士論文 (2015)

[39] 柯志忠,“以原子層沉積製程成長氧化物薄膜與金屬奈米顆粒及其應用”,國研科技,24期, p. 29, 2009.

[4] Y. Xia, P. Yang, et al. “One-dimensional nanostructures: synthesis, characterization, and applications”, Adv. Mater, 15, 353 (2003).

[6] J. Du, D. Liang, H. Tang, and X. P.A. Gao, “InAs Nanowire Transistors as Gas Sensor and the Response Mechanism,” Nano Lett., Vol. 9, No. 12 (2009).