氧化鉿/二氧化矽介電層金氧半結構之製程開發及穿隧電流特性分析

隨著IC產業持續發展，為了討論元件的品質及穩定度，電性及材料上的量測及分析更顯得重要。在本論文中，我們將製備Al/HfO2/SiO2/Si及Al/SiO2/Si金氧半電容元件並進行探討。其中，二氧化矽的生成方式是利用陽極氧化之技術，而二氧化鉿的製備則是先利用濺鍍機將鉿元素濺鍍到試片上後，再利用硝酸氧化的方式生成。此外，論文中包含諸多電性上的量測，如:電容-電壓特性曲線(C-V)，電流-電壓特性曲線(I-V)，定電流應力測試(CCS)，定電壓應力測試(CVS)，及零時間崩潰電場測試(TZDB)…等，並進行分析及討論所觀察到的現象。在第二章中，關注的重點在於有無照光情形下的電性量測分析。我們製備Al/SiO2/Si (S)，Al/HfO2/SiO2/Si (H)，及Al/3HfO2/SiO2/Si (3H，二氧化鉿分三次成長)三種不同結構之金氧半電容元件。首先，我們觀察到C-V發生深空乏與I-V發生電流飽和時的對應閘極偏壓(VG)之同時性。其次，藉由量測結果會發現元件H在與S相比之下，會有較高的光靈敏度。最後，則是探討三種元件中不同面積的圖形，在不同光強度下其飽和電流展現之面積相依性或週長相依性。在第三章裡，我們利用不同製程過程來製備Al/HfO2/SiO2/Si結構之金氧半電容元件，並探討及分析其中存在之差異。在第一部份中，我們發現在TZDB測試當中，二氧化鉿分開成長之結構相較於一次性成長，擁有較高的崩潰電場；此外，界面層(IL)對於元件的重要性也會在本部份說明。而在第二部份中，我們將探討不同長度時間之氧化後熱退火(POA)步驟對於元件造成的影響，其中包含C-V、I-V、載子誘補特性、穩定度分析、及光靈敏度之探討。我們發現經過較長時間POA步驟之元件(如30分鐘)，將會有更優異的電特性及穩定度。在第四章中，我將歸納出本論文的重點，並提出一些未來的研究主題及方向，以更了解金氧半電容元件之基礎物理知識及探討。

關鍵字

金氧半電容元件；電性量測；高介電係數材料；介電層堆疊結構；穿隧電流

並列摘要

Through the continuous development of IC industry, the studies of electrical and material properties become even more important for the investigation of device performance and reliability. The MOS capacitor with structures of Al/HfO2/SiO2/Si and Al/SiO2/Si are fabricated in this work. The SiO2 layer is formed by anodization oxidation (ANO) technique, while nitride acid oxidation (NAO) is used after the sputtering of Hf in order to form a HfO2 dielectric layer. Both methods not only show an advantage of cost-effective process but could also be carried out in room temperature environment. Numerous electrical characterizations, for example, capacitance-voltage (C-V), current-voltage (I-V), constant current stress (CCS), constant voltage stress (CVS), and time-zero dielectric breakdown (TZDB) etc., are performed followed by further analyses and discussions. Three samples with different structures of Al/SiO2/Si (S), Al/HfO2/SiO2/Si (H), and Al/3HfO2/SiO2/Si (3H, with HfO2 layer stacking 3 times) are fabricated in chapter 2. The measurement under dark and illumination is the focus in this chapter. The co-existence of the deep depletion (from C-V) and the current saturation (from I-V) was observed. In addition, the illumination sensitivity is found higher for sample H than S. The area-dependence or perimeter-dependence of the saturation current under various illumination intensities for three structures with different dimension patterns is also investigated. In chapter 3, samples of structure Al/HfO2/SiO2/Si with different manufacturing processes are fabricated, and the differences of electrical analyses are discussed. In the first part of this chapter, it demonstrates that sample with tandem HfO2 dielectric layer as gate dielectric structure has a higher breakdown field in TZDB test. The importance of interfacial layer (IL) for maintaining good interface quality is also discussed in this part. In the second part, three samples with different durations of postoxidation annealing (POA) are fabricated. We conclude that the sample with a longer duration of POA (30 mins) has better electrical performances including C-V, I-V, trapping characteristic, reliability, and illumination sensitivity. The summary is given in chapter 4. Possible future works are proposed to further explore the fundamental physics and mechanisms of MOS capacitors with various materials and physical thickness of the gate dielectric layer.

並列關鍵字

MOS ； electrical measurements ； high-k dielectric ； stacking dielectric structure ； tunneling current

參考文獻

[1] W. Schockley, “Circuit Element Utilizing Semiconductive material” United State Patent Office., Patent US2569347.

[2] J. A. Fleming, “Improvements in Instruments for Detecting and Measuring Alternating Electric Currents” United Kingdom Patent Office., Patent GB24850.

[3] M. Tanenbaum, L. B. Valdes, E. Buehler and N. B. Hannay, “Silicon n-p-n Grown Junction Trnsistors” J. Appl. Phys., Vol. 26, pp. 686, 1955.

[5] J. S. Kilby, “Invention of the Integrated Circuit” IEEE Trans. Electron Devices., Vol. ED-23, pp. 648, 1976.

[8] G. Timp, J. Bude, K. K. Bourdelle, J. Garno and M. Green, “The ballistic nanotransistor” in IEDM Tech. Dig., pp. 55, Dec. 1999.

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氧化鉿/二氧化矽介電層金氧半結構之製程開發及穿隧電流特性分析

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