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  • 學位論文

可靠度研究:複晶矽薄膜電晶體、非晶矽太陽能電池及矽鰭式場效電晶體

Reliability Study:Polycrystalline Silicon Thin Film Transistor, Amorphous Silicon Solar Cell and Silicon FinFET

指導教授 : 劉致為
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摘要


本文主要係進行複晶矽薄膜電晶體、非晶矽太陽能電池及矽鰭式場效電晶體之可靠度研究與分析。對於金屬氧化物半導體場效電晶體及薄膜電晶體來說,為了確保元件的穩定性及確定其生命週期,直流偏壓溫度不穩定性的分析已成為一個重要的可靠度研究。當施加負偏壓於P型薄膜電晶體時,因表面的施體缺陷造成臨界電壓往負偏壓方向移動。若在進行負偏壓溫度不穩定性的量測時有存在著延遲時間的影響,則會低估或是高估實際臨界電壓的移動量。在本文中將研究複晶矽薄膜電晶體的不同直流偏壓溫度不穩定性量測方式。並提出一改良後的量測方式以同時萃取出臨界電壓移動量及載子移動率的減少量。 本文的第二部份將探討非晶矽太陽能電池的可靠度。近年光伏產業積極發展薄膜太陽能電池以期降低生產成本。在眾多薄膜太陽能技術中,以非晶矽太陽能電池發展最成熟。但非晶矽太陽能電池在光照後會因更多斷鍵的產生而劣化。而此光致劣化可以經由在特定溫度下施加負偏壓來回復其部份效率。本文的第三章及第四章主要係研究光致劣化後的非晶矽基太陽能電池於施加負偏壓後的效率回復。實驗結果顯示效率回復比例與施加偏壓的電場大小呈正相關,並發現在非晶矽/微晶矽疊層電晶體上僅需要較小的負偏壓就可以回復其光致劣化效應。在本文的第五章也同時探討了不同非晶矽基太陽能電池的溫度係數。 本文的最後一個主題係研究矽鰭式場效電晶體的電性及熱效應分析。為了遵循摩爾定律,當互補式金屬氧化物半導體技術持續微縮到22奈米以下,傳統電晶體將達到其根本性的限制。而為了更有效的控制電晶體特性及降低短通道效應,像鰭式場效電晶體這樣的全空乏多閘極元件便被提出。而元件在操作時會產生熱,對於晶片的可靠度及壽命有著非常大的影響,且當元件尺寸持續微縮時,此類奈米尺寸元件的熱效應研究變得更加重要而需要考慮其影響。塊狀基板矽鰭式場效電晶體在高溫時的電特性與傳統電晶體相同,其汲極電流會隨著溫度上升而下降。而多根鰭的矽鰭式場效電晶體也會因散熱路徑較單根少而使元件溫度較高。但多鰭的鰭式場效電晶體溫度可藉由改變連線的組成材料而大幅降低。

並列摘要


In this dissertation, three reliability topics are investigated on polycrystalline silicon thin-film transistors, amorphous silicon solar cells and silicon FinFETs. Static bias temperature instability has becomes a crucial reliability issue to accurately ensure the device stability and lifetime for metal-oxide-semiconductor field-effect transistors (MOSFETs) and thin-film transistors (TFTs). For NBTI of p-channel poly-Si TFTs, the negative threshold voltage is mainly attributed to the generation of donor type interface traps. However, the threshold voltage shift will be under- or overestimate if the measurement methods have delay time. In this dissertation, different measurement methods of negative bias temperature instability on poly-Si TFTs are investigated. An improved method is proposed to simultaneously extract the threshold voltage shift (ΔVT) and mobility degradation. For the second part of this dissertation, the reliability of amorphous silicon based solar cells will be discussed. Recent years, the global photovoltaic industries actively invested the development of the thin film solar cells to reduce production cost. Among these thin film technologies, the most developed is amorphous silicon solar cells. However, the amorphous silicon based solar cells degrades after light soaking due to the generation of more silicon dangling bonds. Fortunately, the light-induced degradation can be partially recovered by applying reverse bias at moderate temperature. In Chapter 3 and Chapter 4, reverse bias recovery of light-induced degraded amorphous silicon based solar cells are investigated. The experimental results show that efficiency recovery increases with the field strength. And a surprisingly low bias voltage is found for recovery on micromorph solar cells. In Chapter 5, the temperature coefficient of amorphous silicon based solar cells are also investigated. In the last part of this dissertation, the electrical characteristics and thermal effect of silicon FinFETs are investigated. As CMOS technology scales down to 22nm, traditional planar transistor architectures have reached a fundamental limit to continue the Moore’s law. The fully-depleted multi-gate device such as FinFET has been proposed to improve transistor electrostatics, offering better performance at lower supply voltages and significantly reduced short channel effects. The transistors generate heat when operating, and have a significant impact on the chip’s reliability and long term longevity. Besides, as the channel dimensions continue to shrink, the heating effect of these nano-dimension devices also become critical and should be considered. The electrical characteristics of bulk FinFET shows the same behavior with planar structure at high temperature. The on-current decreases with increasing temperature after subtracting the threshold voltage shift. Multi-fin FinFET shows higher lattice temperature than 1-fin FinFET due to less heat transfer path. The maximum lattice temperatures of multi-fin FinFETs can be reduced by changing the constituted materials of interconnect.

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