在5G網路下針對低密度奇偶校驗碼與極化碼之通用信度傳播解碼器設計與晶片實現

Design and Chip Implementation of Unified Belief Propagation Based Decoder for LDPC and Polar Codes in 5G Networks

蘇倍陞(Bei-Sheng Su)

指導教授 ： 闕志達

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2020年)

https://doi.org/10.6342/NTU202002890

摘要

隨著人們對於超高可靠度與低延遲的需求日益提升，前向錯誤更正碼(FEC)已是現代通訊不可或缺的技術之一，其中極化碼與低密度奇偶校驗碼因為解碼的表現可以非常接近香農極限，已被5G系統中的增強型行動寬頻通訊(eMBB)所採納使用，分別拿來保護控制訊號與數據訊號。然而，這兩種錯誤更正碼皆可利用信度傳播(Belief Propagation)的方式進行解碼，其為一種可全平行化的演算法，可以有效應用於低延遲與高吞吐量的通訊系統中。本論文主要研究基於信度傳播的解碼器設計，一共有兩大主軸，一是改善極化碼於傳統信度傳播下解碼表現不佳的問題，二是設計一共用的電路架構使得兩種碼能夠在不同的時間上於同一套硬體資源上進行解碼，進而降低傳統上需要兩套單模式解碼器所需的面積。

在本論文的第二章中，介紹了兩種錯誤更正碼的基礎理論、編碼與解碼的方法與於5G系統下的使用方式，並去比較不同解碼方法的性能表現，包含塊錯誤率(BLER)、平均所需迭代數、運算延遲與運算複雜度，來決定第四章中的硬體架構需要採取何種方案。

在第三章中，我們運用另一種最佳化的演算法---遺傳算法套用基於信度傳播的極化碼解碼過程中，使得迭代過程更具有方向性，更容易找到傳統方法所無法成功解碼的結果，而一共有兩種施行方法，分別為修改左訊息法與修改右訊息法，經模擬顯示其解碼性能可以與CA-SCL (L=8)相當，並且仍保有天生平行的優勢。於本章的末節，亦會探討不同解碼方法的複雜度，及參數的選擇方式。

在第四章與第五章中，我們利用兩種碼都能透過信度傳播解碼的特性，設計出一套通用的硬體架構並實作成晶片，使其可以在不同時間下支援兩種模式。除了共用架構，我們亦針對各別模式進行優化，包含低複雜度及多模式的處理單元設計、儲存方式的優化、低功耗的設計與特殊的排程等。比起兩個單一模式的解碼器，共用的架構可以省去約35%的面積使用，並且其餘相關的硬體指標並不會與其他文獻單一模式的解碼器相差太多，顯示我們設計的共用架構並不會付出太多額外的成本。

關鍵字

前向錯誤更正碼 ； 低密度奇偶校驗碼 ； 極化碼 ； 信度傳播 ； 遺傳演算法

並列摘要

With the increasing demand for ultra-high reliability and low latency, forward error correction codes (FEC) has become one of the indispensable technologies in modern communication systems. Among them, polar codes and low-density parity-check (LDPC) codes are appealing since their performance is very close to the Shannon limit. Given this, they have been adopted in Enhanced Mobile Broadband Communication (eMBB), one of the 5G use cases, to protect control and data channels, respectively. However, both error correction codes can be decoded by Belief Propagation (BP), a fully parallelizable algorithm that can be effectively applied to low-latency and high-throughput decoding. This thesis focuses on the design of a dual-mode BP based decoder. Toward this end, there are two main issues. One is to improve the inferior decoding performance of polar codes using conventional belief propagation. The other is to design a unified hardware architecture so that the two codes can be decoded on the same hardware, replacing two single-mode decoders and thus reducing the die area and associated cost.

In Chapter 2, the basic principles of two error correction codes, the encoding and decoding methods and the usage in 5G system are introduced. Moreover, the performance of different decoding methods is compared, including block error rate and average iteration number, latency, and complexity.

In Chapter 3, we adopt the genetic algorithm to improve the decoding process of polar codes based on belief propagation, making the iterative process more effective in finding the optimal solution that conventional methods cannot. We propose two implementation methods, namely the modified left message method and the modified right message method. Simulation results show that the decoding performance of the proposed methods can be comparable to CA-SCL (L=8), while still maintaining the inherent parallel characteristic. At the end of this chapter, we also discuss the complexity of different decoding methods and the parameter setting.

In Chapters 4 and 5, we take advantage of the fact that both codes can be decoded by belief propagation and design a unified hardware architecture. In addition to sharing processing elements and memory, we also optimize several aspects of the decoder, including low-complexity and multi-mode processing unit design, storage optimization, low-power design, and special scheduling. Compared with the single-mode decoder, the unified architecture can save about 35% die area, and other hardware figure of merits (FOM) are similar to other single-mode decoder implementations, indicating the proposed architecture is quite area efficient.

並列關鍵字

forward error correction codes (FEC) ； low-density parity-check (LDPC) code ； polar code ； belief propagation (BP) ； genetic algorithm

參考文獻

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