基於佇列式影像分割之光場資料深度估測與硬體實現

Depth Estimation Algorithm with Queue-Based Segmentation and Its Hardware Implementation for Light Field Data

陳奕翔(Yi-Hsiang Chen)

指導教授 ： 盧奕璋

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2014年)

https://doi.org/10.6342/NTU.2014.10402

摘要

本論文主要研究利用光場資料進行深度估測的演算法與硬體加速器設計。一般來說，光場資料之深度估測主要可分成三個階段:可信度傳遞、影像分割與平面擬合。在這篇論文中，分別對這三個階段進行了設計與改良。
首先在可信度傳遞項目上，由於可信度傳遞的計算時間及記憶體使用量皆與傳遞訊息的數量有關，因此我們提出以單一方向取代原來四個方向的訊息傳遞方法。對於影像分割則提出適合硬體實現之佇列式影像分割演算法，藉由依序對儲存的區塊資訊進行更新與固定每次疊代產生區塊之上限，透過管線化設計將影像分割計算時間減少至一次疊代所需時間。同時修改平面擬合的參數選取條件以利於硬體設計。
由於深度估測是一個很耗時的演算法，為了提升深度估測的運算速度，我們以積體電路實作兩塊深度估測處理器，以TSMC90製程實現，運作頻率皆為100 MHz，一塊為改良式區域可信度傳遞，晶片尺寸為6.447 mm2，核心尺寸為4.322 mm2，消耗功率為281.3 mW，另一塊為佇列式影像分割與平面擬合，晶片尺寸為6.152 mm2，核心尺寸為4 mm2，消耗功率為172.9 mW。

關鍵字

光場 ； 深度估測 ； 可信度傳遞 ； 影像分割 ； 平面擬合 ； 硬體實現

並列摘要

In this thesis, we propose a new depth estimation algorithm and its hardware implementation for light field data processing. The algorithm is divided into three stages: belief propagation, segmentation, and plane fitting. All three stages are redesigned here to have better performance.
First, since the computation time and the usage of memory in belief propagation strongly depend on the number of messages, for each pixel, we replace four outward messages by a common message for all four directions. Secondly, we propose a queue-based segmentation algorithm which is suitable for hardware implementation. The algorithm updates stored segments by reading pixels in a raster scan manner, and fixes the maximum number of segments in each iteration. In addition, we use pipeline architecture in the hardware design to reduce the computation time of segmentation into one iteration. Then we redesign the selection criteria in plane fitting to make it suitable for hardware implementation.
Finally, we implement two depth estimation processors using TSMC 90 nm cell library. One is for improved tile-based belief propagation. The chip and core sizes are 6.447 mm2 and 4.322 mm2, respectively. The power consumption is 281.3 mW when operating at 100 MHz. The other one is for queue-based segmentation and plane fitting. The chip and core sizes are 6.152 mm2 and 4 mm2. The power consumption is 172.9 mW when operating at 100 MHz.

並列關鍵字

Light field ； depth estimation ； belief propagation ； segmentation ； plane fitting ； hardware implementation

參考文獻

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