- 學位論文
應用於生醫電子的三角積分類比數位轉換器
Delta-Sigma ADC for Biomedical Electronic Applications
摘要
隨著IC產業的蓬勃發展，穿戴式裝置在人們生活中的角色將變得越來越重要，其中生醫電子更是一個熱門的主題。由於生醫訊號非常的微小，為了能得到準確的結果，即需要高解析度的類比前端電路與感測器結合。然而許多生醫訊號往往伴隨著基準線漂移的問題，使前端放大器的放大倍率受到極大的限制，因此提高了對類比數位轉換器的解析度要求。快速連續漸進暫存器式類比數位轉換器雖然具有中速與低功耗的優點，然而其解析度會受到電容大小的限制，當解析度需求大於12位元時，其功耗與設計難度將會大幅度地增加。而生醫訊號頻率大多小於一千赫茲，正好符合三角積分器式類比數位轉換器操作頻率低的特性。三角積分器式類比數位轉換器可透過雜訊型塑來降低高頻的量化雜訊，同時，高於訊號頻率數倍的取樣頻率可降低頻帶內的雜訊，透過上述這兩種效果，使得三角積分器式類比數位轉換器可以輕易達到高解析度的效果。 本篇論文提出應用於生醫電子的低功耗三角積分類比數位轉換器的設計方法，包括整體系統規格設計、前端MATLAB程式模擬流程、電路公式推導與實體端電路設計考量等，並利用此方法設計出兩顆三角積分類比數位轉換器，而所得結果也與先前設計模擬之結果相符合。為了符合生醫感測器的趨勢需要。兩電路皆使用UMC 0.18um的製程技術來完成。兩個設計皆使用CIFF-B的三階架構，其中包含兩條訊號回授路徑與一條前饋路徑，以減少能量的消耗。其中第一個設計的電路共消耗了384.21 uW，有效位數達到12.83 bits。第二個設計較為成功，不只改變了積分器的架構減少不必要的能量消耗，還增加了共振回授的路徑，利用雜訊型塑的缺口特性進一步提高了電路整體的解析度，使電路的總功耗降至260 uW，並且達到有效位數14.7892 bits的解析度。
並列摘要
As the IC industry getting flourish, wearable devices become gradually important in daily life. Among them, biomedical electronic is one of the famous topics. Because of the extremely small of the biomedical signal, to obtain the accurate consequences, a system that combines a high resolution analog front-end circuit with sensors is required. Nevertheless, dealing with biomedical signals always has problem with baseline drifting which limits the gain of the front-end amplifier. Thus, the resolution demands of analog to digital converter (ADC) become higher. Although successive approximate register (SAR) ADC can operate in mediate speed and has the advantage of low power consumption, its resolution is restricted by the size of the capacitor. When encountering the requirement of resolution that exceeds 12-bit, the design complexity and power dissipation of SAR ADC will increase dramatically. Most of biomedical signals are under 1 kHz, which exactly fit the characteristic of delta-sigma ADC for its low operation frequency. With the help of noise shaping, the quantization noise at low frequency can be reduced. Simultaneously, sampling frequency is several times higher than the signal frequency can depress the in-band noise. Through above two features, delta-sigma ADC can achieve high resolution easily. In this thesis, the design method of implementation of delta-sigma ADC for biomedical applications is proposed. It includes the plan of the whole system specifications, front-end MATLAB simulation process, derivation of circuit principles, and considerations of real circuit implementation. With this flow, two delta-sigma ADC were taped out, and the results correctly met previous simulations. To meet the trend of biomedical sensor requirement, the chips were fabricated by the process of UMC 0.18 um. Both of the designs employ CIFF-B 3rd order architecture, which contains two feedback paths and a feed-forward path to reduce power dissipation. The power of the first chip totally consumes 384.21 uW and achieves effect number of bits of 12.83 bits. The second chip is relatively outstanding. Its design not only change the structure of the integrator to reduce unnecessary power dissipation but also adds a resonance feedback loop. With the notch characteristic on noise shaping, the performance of the circuits is enhanced. The total power of the chip is lower to 260 uW and ENOB reaches 14.7892 bits.