毫米波低雜訊放大器及應用於5G無線系統之混頻器的研究

Research of Millimeter Wave Low-Noise Amplifier and Down-Conversion Mixer for 5G Applications

李牧恆(Mu-Heng Li)

指導教授 ： 王暉

國立臺灣大學/電機資訊學院/電信工程學研究所/碩士(2021年)

https://doi.org/10.6342/NTU202101451

摘要

本論文包含三個部分。第一部份是應用於短距離無線通訊的V頻段極低功耗的低雜訊放大器，使用90奈米金氧半場效電晶體製程設計。第二部分是應用在16到53 GHz 高線性度降頻器，使用65奈米金氧半場效電晶體製程設計。最後一部分是應用於毫米波第五代無線通訊系統的38-GHz 可變增益降頻器，使用65奈米金氧半場效電晶體製程設計。
論文的第一部分提出了一個應用在V頻段極低功耗的低雜訊放大器。此電路使用雙重變壓器耦和技術在輸入級提供足夠增益及低雜訊表現。除此之外，在輸出級使用單端中和技術和自諧振變壓器匹配技術。量測結果顯示本文提出的低雜訊放大器在64.3 GHz的頻率下有16.8 dB的小訊號增益和17-GHz的3-dB頻寬，且在操作頻率內有7 dB平均雜訊指數在5.7-mW的功耗下。
第二部分提出應用在16到53 GHz 高線性度降頻器。為了提高降頻器的線性度，在降頻器輸出端加入線性化巴倫器。量測結果顯示此降頻器在操作頻率內有0.5±2 dB的轉換增益，直流功率損耗為5.9-mW。而雙頻量測則顯示明顯的三階交互調變訊號抑制，且在28-GHz 及38-GHz的輸入三階截點功率分別為20及21 dBm。在調變量測使用256-QAM的訊號下，電路輸出功率可以受三階交互調變訊號抑制而改善。
最後一部分提出了一個在混頻級使用主動和被動結合混頻核技術降頻器，來達到可變增益及輸出功率1 dB壓縮點控制功能。我們可以透過討論降頻器輸入及輸出阜阻抗來分析電路工作原理。量測結果顯示此降頻器在38 GHz頻率點此可變增益降頻器增益控制範圍達到5.8 dB，輸出功率1 dB壓縮點變化為1.2 dB，另外直流功率損耗為10.4-mW。

關鍵字

互補式金屬氧化物半導體製程 ； V頻段 ； 第五代行動通訊 ； 低雜訊放大器 ； 降頻器

並列摘要

This thesis consists of three parts. The first part is a V-band ultra-low-power low noise amplifier in 90-nm CMOS process for short-distance wireless communication. Another shows a 16-53 GHz high-linearity down-conversion mixer in 65-nm CMOS process. The other presents a 38-GHz variable gain down-conversion mixer in 65-nm CMOS process for fifth-generation wireless systems.
In the first part, a V-band ultra-low-power low noise amplifier is presented. The double-transformer-coupling (DTC) technique is used to achieve sufficient gain and low noise performance in the first stage. Also, single-ended neutralization technique and self-resonant transformer matching is applied to the circuit. The proposed low noise amplifier achieves 16.8 dB small signal with 17-GHz 3-dB bandwidth (50-67 GHz) and the 7-dB average noise figure in operating frequency with 5.7-mW dc power.
In the second part, a 16-53 GHz high-linearity down-conversion mixer is presented. To improve the linearity of the down-conversion mixer, the linearized active balun in the proposed design is used. The proposed down-conversion mixer achieves 0.5±2 dB conversion gain in operating frequency with 5.9-mW dc power. The two-tone measurement results exhibit a conspicuous suppression of third-order intermodulation power and achieve 20 and 21 dBm input third-order intercept point at 28 and 38 GHz respectively. The modulation measured results using single-carrier 256-QAM signal, the proposed mixer also shows an output power level improvement by the linearization.
In the last part, the active and passive mixing cores combined down-conversion mixer to provide gain control function with a constant OP1dB is proposed. The circuit operation can be discussed by the impedance analysis at input and output ports of the mixer. The proposed down-conversion mixer achieves 5.8 dB gain control range with 1.2 dB OP1dB variation and 10.4 mW dc power.

並列關鍵字

CMOS ； V-band ； 5G ； Low noise amplifier ； Mixer

參考文獻

[1] https://www.businesswire.com/news/home/20160718005293/en/FCC-Adopts-New-Rules-Unlicensed-V-Band-Extending

[2] E. Öjefors et al., "A 57-71 GHz beamforming SiGe transceiver for 802.11 ad-based fixed wireless access," 2018 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Philadelphia, PA, USA, 2018.

[3] A. Tomkins et al., "A 16-element phased-array transceiver in 130-nm SiGe BiCMOS for fixed wireless access covering the full 57-71 GHz band," 2020 IEEE Radio and Wireless Symposium (RWS), San Antonio, TX, USA, 2020.

[4] M. Yaghoobi, M. Yavari, M. H. Kashani, H. Ghafoorifard and S. Mirabbasi, "A 55–64-GHz low-power small-area LNA in 65-nm CMOS with 3.8-dB average NF and ~12.8-dB power gain," in IEEE Microwave and Wireless Components Letters, vol. 29, no. 2, pp. 128-130, Feb. 2019.

[5] NTTDOCOMO. “About 5G,”GSMA Mobile World Congress 2017 (MWC 2017), Accessed: 2017. [Online]. Available: https://www.nttdocomo.co.jp/english/info/media_center/event/mwc2017/