Low-energy electron beam lithography (LEEBL) is a promising patterning solution for the 22-nm half-pitch node and beyond due to its high resolution, low substrate damage, and increased resist sensitivities. In order to achieve throughout required for high-volume manufacturing, writing parameters such as probe size, pixel size, electron dosage, proximity correction scheme, and number of beams need to be carefully selected in a Gaussian-beam–raster-scan system. In high-throughput LEEBL, line edge roughness (LER) caused by shot noise becomes a critical issue for both device patterning and device performance variability. To characterize these effects, stochastic MOSFET gate patterning with LEEBL is constructed by overlapping energy distributions from an in-house electron scattering Monte Carlo simulation program with various writing parameters. Parameter optimization can help provide initial guidelines and specifications for design and operation of multiple electron beam direct-write systems.