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  • 學位論文

毫米波CMOS相移器與低相位變化電路之設計與分析

Design and Analysis of Millimeter-wave CMOS Phase Shifter and Low Phase Variation Circuits

指導教授 : 黃天偉
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摘要


本論文介紹並實現了一些在相位陣列系統中相當重要的元件。本論文可分為三部分,第一部分中設計並實現了一個操作在V頻段應用於相位陣列系統的四位元互補式金氧半場效電晶體 (CMOS) 相移器,第二部分實現了一個五位元相移器並將此相移器與一低相位變化之可變增益放大器整合,第三部分介紹一個低相位變化之衰減器。此衰減器利用電感來消除電晶體的寄生電容以達到低相位變化的目的。 近年來由於無線通訊的快速發展,大部份低頻以及微波頻段的頻譜已經被高度使用。而在接近60-GHz頻段附近有著最高可達到9-GHz的頻寬,如此大的頻寬很適合用來傳輸大量的資料。因此,高傳輸速率及大量資料傳輸已成為未來發展的趨勢。但是由於氧氣在60-GHz的共振,讓訊號在空氣中傳播時會快速的衰減,使得到達接收端的訊號變的微弱。另外,接收端的雜訊(NF)以及發射端的輸出功率也限制了60-GHz系統的發展。相位陣列系統提供了以上問題的解決辦法,相位陣列的優點包含了,能夠將多路訊號結合以補償訊號在空氣中的損耗,改善接收端的SNR以及降低發射端功率放大器的要求。 此論文的第一部分設計並實現了一個操作在V頻段應用於相位陣列系統的四位元開關式相移器,以往相移器利用電容來實現相位延遲,但是在高頻時,這個電容的容值會變得非常小,而小電容容易受到製成變異的影響,因此在此設計中,我們避免小電容的使用,而利用傳輸線來代替這個小電容以減少製程變異的影響以及達到低群延遲變化。此相移器的損耗平坦度設計在頻寬內能夠達到平坦的損耗,量測的平坦度為 ± 0.8-dB從57到64 GHz. 群延遲變化以及最大損耗的量測結果分別為 ± 6 -ps 以及14.5-dB。 本論文的第二部分實現了一個操作在V頻段應用於相位陣列系統的五位元開關式相移器,並將此相移器和一個低相位變化的可變增益放大器作結合。五位元相移器提供了更高的解析度以供相位陣列使用。高解析度能夠讓天線的主波束指向更準確的方向,以提高SNR。群延遲變化與最大損耗的量測結果為 ± 0.8-dB 以及 ± 8.5-ps。此相移器配合一低相位變化的可變增益放大器,可以讓增益在調整的時候,盡量不去影響到相移器的相位,如此可降低系統控制複雜度。可變增益放大器在增益調整6.2-dB的情況下,其相位變化僅1.86度。 本論文的第三部分為一低相位變化衰減器。衰減器與可變增益放大器同為可調整增益的元件,可變增益放大器可以提供增益,然而衰減器因為是被動的,有著不消耗直流功率以及線性度較好的優點。此衰減器利用電感來抵銷電晶體開關的寄生電容以達到低相位變化。此衰減器最大衰減量以及相位變化分別為34-dB以及6.5度。

並列摘要


This thesis introduced and investigated some important components in the phased array systems. Two 60-GHz switch-type phase shifters (4-bit and 5-bit), an integrated 60-GHz phase shifter and VGA and a 0-20 GHz low phase variation attenuator are presented in this thesis. As the growing demands for wireless communication, the lower frequency bands are fully occupied with various communication applications. Due to an up to 9-GHz unlicensed wide bandwidth around 60-GHz, the millimeter-wave frequency bands are suitable for high data rate wireless transmission. However, the oxygen absorption causes the dissipation of signal during transmission, especially for non-line-of-sight (NLOS) situation. Besides, the limited noise figure of the receiver and the limited output power of the transmitter also restrict the applications at 60-GHz. Phased array technique is an attractive solution to the problem mentioned above. The advantages of phased array systems include path loss compensation, channel capacity enhancement and signal-to-noise ratio improvement. Therefore, it can relax the requirements of the RF transceiver front-ends. The thesis can be constructed in to three parts. The first part presents a 4-bit switch-type phase shifter using TSMC 90-nmLP CMOS technology. The proposed phase shifter uses all-transmission lines topology to avoid using small-size capacitors which can be easily affected by process variation. The transmission-line topology can alleviate the error caused by process variation and achieve low group delay deviation. The phase shifter is carefully designed to achieve excellent insertion loss flatness of ± 0.8-dB from 57-64 GHz. The measured group delay deviation and maximum insertion loss of the 16 phase-shifting states is ± 6-ps over 57-63 GHz and 14.5-dB at 60-GHz, respectively. The second part consists of a 5-bit switch-type phase shifter and an integrated phase shifter and VGA. Compared to the 4-bit phase shifter, the 5-bit switch-type phase shifter can provide a higher resolution in a phased array system and thus improving the signal-to-noise ratio with a cost of sacrificing a little insertion loss. The 5-bit phase shifter achieve a maximum insertion loss of about 18-dB over 57-64 GHz. The insertion loss flatness and group delay deviation are ± 0.8-dB and ± 8.5-ps from 57-64 GHz, respectively. The integrated phase shifter and VGA features the independent phase and tuning. The low phase variation VGA can provide gain variation of 6.2-dB with only 1.86˚ phase variation, this low phase variation property can ensure the phase of the phase shifter will not be affected by the VGA gain tuning. The third part is a low phase variation attenuator. Compared to the VGA, the attenuators are suitable for systems with high linearity requirements. The attenuator utilizes a spiral inductor to cancel out the parasitic capacitors of a transistor to achieve low phase variation. The measured maximum attenuation is about 34-dB with a phase variation of 6.5˚. In summary, two phase shifters and a phase shifter integrated with VGA operating from 57-64 GHz are presented. The designs are suitable for 60-GHz phased array systems, targeting for high-data-rate wireless transmission. A 0-20 GHz low phase variation attenuator is shown as well.

並列關鍵字

60GHz phase shifter low phase variation VGA attenuator

參考文獻


[1] B.-W. Min and G. M. Rebeiz, “Single-ended and differential Ka-band BiCMOS phased array front ends,” IEEE J. Solid-State Circuits, vol. 43, no. 10, pp. 2239-2250, Oct. 2008.
[2] Xiangwei Zhu; Yuanling Li; Shaowei Yong; Zhaowen Zhuang; , “A Novel Definition and Measurement Method of Group Delay and Its Application,” IEEE Transactions on Instrumentation and Measurement, vol.58, no.1, pp.229-233, Jan. 2009
[3] Wei-Je Tseng; Chin-Shen Lin; Zuo-Min Tsai; Huei Wang; , “A miniature switching phase shifter in 0.18-μm CMOS,” Microwave Conference, 2009. APMC 2009. Asia Pacific , pp.2132-2135, 7-10 Dec. 2009
[6] Kwang-Jin Koh; May, J.W.; Rebeiz, G.M.; , “A Millimeter-Wave (40–45 GHz) 16-Element Phased-Array Transmitter in 0.18-μm SiGe BiCMOS Technology,” Solid-State Circuits, IEEE Journal of , vol.44, no.5, pp.1498-1509, May 2009
[8] Krishnaswamy, H.; Valdes-Garcia, A.; Jie-Wei Lai; , “A silicon-based, all-passive, 60 GHz, 4-element, phased-array beamformer featuring a differential, reflection-type phase shifter,” Phased Array Systems and Technology (ARRAY), 2010 IEEE International Symposium on , pp.225-232, 12-15 Oct. 2010

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