應用於軟體自我測試之電路老化缺陷偵測

Software-Based Self-Test for Aging Defect Detection

林子翔(Tzu-Hsiang Lin)

指導教授 ： 黃俊郎

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2018年)

https://doi.org/10.6342/NTU201803476

摘要

由於傳統結構性測試的不足，應用軟體自我測試(software-based self-test)成為了非侵入性、功能性以及全速測試的替代方案。應用軟體自我測試的技術可彌補傳統結構性測試的不足，並且能在客戶使用階段提升硬體可靠性(reliability)。在論文中，我們建立了一套完整的應用軟體測試流程，其中包含非功能性測試限制提取、測試圖騰指令轉換器、測試程式產生器、電路錯誤模擬器。此外，為了確保所產生測試程式之測試品質，我們亦提供了隨機程式評估比較結果於文末。

我們所提出的應用於軟體測試流程目的為在程式或應用執行的過程中，偵測出可能發生的電路老化缺陷(aging defect)及錯誤。所使用的錯誤模型為電路老化效應(aging effect)所造成的硬體缺陷，我們將模擬因電路老化效應所造成的路徑延遲錯誤(path delay fault)及轉態延遲錯誤(transition delay fault)，以偵測電路老化效應的初期現象。

關鍵字

應用軟體自我測試 ； 電路老化效應 ； 系統可靠性 ； 積體電路系統測試

並列摘要

Since the insufficient of conventional structural test, software-based self-test becomes the alternative solution for a non-intrusive, functional and at-speed testing. The use of software-based self-test could compensate the shortages of conventional structural test and enhance the hardware in-field reliability. In the thesis, we have provided a complete test flow for software-based self-test including constraint extraction, pattern-to-instruction converter, test program generator and fault simulator. Besides, in order to confirm the quality of test program generated by our methodology, the results of random program evaluation have been displayed in the last part of this thesis.

The proposed software-based self-test methodology aims to detect the possible hardware faults during the execution of test programs or applications. The target fault model is the hardware fault caused by aging effect. We model the fault behavior as the path delay fault and transition delay fault models for aging fault simulation.

並列關鍵字

Software-Based Self-Test ； Aging Effect ； Reliability ； VLSI System Testing

參考文獻

[1] T. H. Li. (2017). A Flexible Hybrid Fault Simulator for Software-Based Self-Test (Unpublished master’s thesis). National Taiwan University, Taipei, Taiwan.

[2] L. T. Wang, Charles E. Stroud, Nur A. Touba, System-on-Chip Test Architectures: Nanometer Design for Testability. United States: Morgan Kaufmann, 2008, ch.11.

[3] P. C. Maxwell, V. Johansen and I. Chiang, "Functional and Scan Tests: The Effectiveness of I/sub DDQ/ How Many Fault Coverages Do We Need?," Proceedings International Test Conference 1992, Baltimore, MD, 1992, pp. 168-177.

[4] D. Gizopoulos et al., "Systematic Software-Based Self-Test for Pipelined Processors," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 16, no. 11, pp. 1441-1453, Nov. 2008.

[5] A. Krstic, W. C. Lai, K. T. Cheng, L. Chen and S. Dey, "Embedded Software-Based Self-Test for Programmable Core-Based Designs," in IEEE Design & Test of Computers, vol. 19, no. 4, pp. 18-27, Jul/Aug 2002.