揮發或非揮發？可轉換式相變化記憶體為基礎之記憶體系統

相變化記憶體(Phase-Change Memory) 為目前新興且廣泛引人注意的記憶體。其具有位元組可编址性(byte-addressability) 、高存儲密度與與非揮發性等特質，將能夠大大的改善目前對於記憶體階層架構的設計。舉例而言，相變化記憶體之高存儲密度與位元組可编址性的特性，可用於建造大型之記憶體系統，用滿足日趨成長之記憶體容量需求。而相變化記憶體之非揮發性，則可使記憶體能夠如同磁碟一般存取資料或檔案，用以彌補硬碟存取速度較慢的問題。然而，目前主記憶體並不需要儲存非揮發之資料。當多層式儲存 (multi level cell, MLC) 相變化記憶體僅作為主記憶體使用時，其卻因需要維持記憶體之非揮發性而付出昂貴之寫入代價。因此在本篇論文中，我們提出了一種新的相變化記憶體系統的設計概念，相變化記憶體可以同時支援兩種寫入模式以因應不同的使用方式：傳統之非揮發之寫入模式可用於寫入需要長時間保存之資料與檔案；而快而揮發之寫入模式則可適用於相變化記憶體做為主記憶體時，不需要儲存非揮發資料的情況，藉以增進記憶體系統之效能。揮發之記憶體單元需要定期的刷新以保持資料的正確性，而傳統的相變化記憶體設計者認為此刷新動作將造成巨大的能量消耗，並可能危及系統之效能。為驗證提出的設計概念，我們實做了以100 至1000 秒的刷新區間為主的主記憶體系統。分析結果顯示刷新動作所產生之能量消耗可控制在一微小的範圍。實驗結果顯示我們所提出之快而揮發之寫入模式能夠提供系統平均22%的效能改善。

關鍵字

多層式儲存相變化記憶體；非揮發性；資料維持時間

並列摘要

Phase-change memory (PCM) is an emerging and appealing technology nowadays. PCM is byte-addressable, high-density, and non-volatile, so-called “universal” memory, which could revolute the memory hierarchy design. The high density and byte-addressability of PCM enable architects to build largescale memory systems; many works have demonstrated the benefits of supplementing DRAM with PCM in the main memory. To take advantage of its non-volatility, instantly turning on/off computers or maintaining data and files persistent in main memory without accessing disks are also proposed. The byte addressability and non-volatility of PCM blur the line between memory and storage, and call for a rethinking on architectural design. When PCM is used as part of the main memory, non-volatility is unnecessary. Relaxing non-volatility could significantly reduce the write latency of multi level cell(MLC) PCM. Therefore, in this paper, we advocate a new design concept for PCM-based memory system. That is, PCM cells can be written in two different modes, fast-yet-volatile writes for main-memory usage and conventional non-volatile writes for persistency purpose. Volatile memory cells require refreshing to ensure data are valid over time. Conventional wisdom of PCM-based design thinks PCM is power-hungry and refreshing incurs considerable power overhead. On the contrary, we demonstrate that a refresh interval of 1000 seconds leads to insignificant power overhead. Simulation results show that the proposed techniques can improve overall system performance by 22% on average.

並列關鍵字

MLC PCM ； non-volatility ； data retention time

參考文獻

[1] Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, and Jude A. Rivers. Scalable

high performance main memory system using phase-change memory technology. In

[2] Ping Zhou, Bo Zhao, Jun Yang, and Youtao Zhang. A durable and energy efficient

main memory using phase change memory technology. In ISCA ’09, 2009.

[3] Benjamin C. Lee, Engin Ipek, Onur Mutlu, and Doug Burger. Architecting phase

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揮發或非揮發？可轉換式相變化記憶體為基礎之記憶體系統

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