基於中央處理器與圖形處理器整合平台之記憶體系統分析

Analysis of Memory System on CPU-GPU Integration Platform

劉根宏(Ken-Hung Liu)

指導教授 ： 楊佳玲

國立臺灣大學/電機資訊學院/資訊工程學研究所/碩士(2013年)

https://doi.org/10.6342/NTU.2013.01603

摘要

隨著異質性處理器(例如：中央處理器與圖形處理器)整合在同一塊晶片上成為微架構設計的趨勢，從行動平台到高端伺服器，各式各樣依循此特色所設計的計算型裝置有如雨後春筍般湧出，諸如：Intel Sandy/Ivy Bridge、AMD Fusion Llano、NVIDIA Tegra、Qualcomm Snapdragon系列。雖然此種緊密整合的選擇，相較於通用目的處理器帶來更強大的計算功能，和一般具備獨立顯示卡的桌上型電腦相比也提供更好的功耗管理，但是當多個應用程式一起執行時，這些處理元件將會相互競爭共享的記憶體資源，範圍包含：最後一階層的快取和主記憶體。因為應用程式行為相異的特性，圖形處理器容易佔據大多數的記憶體資源，使得中央處理器端資源缺乏，造成整體系統效能的下降。
在本篇論文，我們嘗試結合x86超序中央處理器、架構相似於NVIDIA的圖形處理器和現代的動態記憶體元件，以建構出一個全系統模擬框架，用來模擬中央處理器與圖形處理器共享記憶體系統的整合平台。在此基礎建設上，我們進行一連串的實驗去歸納共享資源競爭的影響，並且依據不同的目標架構實做現今快取管理和記憶體排程的機制，從系統效能的角度去分析當中的利弊得失。

關鍵字

中央處理器 ； 圖形處理器 ； 異質系統 ； 快取管理 ； 主記憶體排程 ； 模擬框架

並列摘要

As integration of heterogeneous processing cores, such as CPU and GPU, on the same chip becomes a trend in the micro-architecture design, from mobile platforms to high-end servers, various computing devices based on this feature have sprung up like mushrooms, e.g., Intel Sandy / Ivy Bridge, AMD Fusion Llano, NVIDIA Tegra and Qualcomm Snapdragon series. Although this tightly integrating choice provides with mightier computing functionality than general purpose processors as well as better power managements than common desktop equipped with a discrete graphics card, those processing units will compete for shared memory resources, including last level cache and main memory, when multiple applications executing simultaneously. Since different characteristics in applications’ behavior, GPU tends to occupy most part of memory resources, which easily leads to starvation at the CPU-side applications, and consequently causes overall system performance degradation.
In this thesis, we try to build a full system simulation framework combing with x86 out-of-order CPU, NVIDIA-like GPU, and modern DRAM for modeling CPU-GPU integration platform sharing with memory system. Based on this infrastructure, we carry out a series of experiments to characterize the effect of shared resource competition and implementing prevalent cache management policy, TAP, and memory scheduling mechanism, SMS, depending on distinct architectural targets to analyze their pros and cons with regard to performance.

並列關鍵字

CPU ； GPU ； heterogeneous system ； cache management ； main memory scheduling ； simulation framework

參考文獻

[3] AMD, “AMD Accelerated Processing Unit (APU) , ” [Online].

[5] Qualcomn, “Qualcomm SnapDragon Series,” [Online].

Available: http://www.qualcomm.com/snapdragon

[Online]. Available: https://code.google.com/p/macsim/

[8] Wikipedia, “Computer Architecture Simulator,” [Online].