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  • 學位論文

使用於寬頻無線通訊之高精準度可編程增益放大器設計

Design of Precision Programmable Gain Amplifier for Broadband Wireless Communication Systems

指導教授 : 曹恆偉

摘要


第五代大型多輸入多輸出無線通訊系統的發展近期來備受矚目,而其核心架構基本上使用空分多址技術以滿足高速資料傳送的需求。然而,此架構的弱點在於容易受到嚴重的時變通道衰減與陣列型天線彼此間增益變異的影響,因此自動增益控制機制對於無線發射/接收機而言就變得非常重要,其主要功能在於等化訊號的強度以滿足系統對於傳輸訊號之訊雜比與線性度的要求,使訊號能夠被正確解調。而可編程增益放大器電路作為自動增益控制電路中非常關鍵的零組件,需要一定的可靠度以確保電路在任何製程與溫度變異的情況下,還能夠維持訊號增益控制的精準度,其分析與設計考量將在本論文中詳述。 本論文的研究方向主要著重在使用於無線接收機前端電路之寬頻、高精準度且具備增益誤差與溫度補償機制的可編程增益放大器的分析與設計,並藉由90-nm互補式金氧半導體製程實作出分別由三位元與五位元數位控制的dB線性可編程增益放大器,其中應用到的電路技巧包括同時使用兩種指數趨近法與具增益誤差補償之可切換電阻網絡架構以提升增益控制的精準度;改良Cherry-Hooper放大器電路以提升操作頻寬;結合自適性偏壓與帶差參考電壓電路以補償溫度變異對於電路造成的影響。 下線製作與實測結果顯示,在此提出的可編程增益放大器其操作頻寬超過1.2HGz,整體增益控制範圍超過52dB,同時具有極小的dB線性增益誤差與溫度變化(-10°C~95°C)所造成的增益偏移;在1.2V電源供應下,此兩種三位元與五位元數位控制的dB線性可編程增益放大器分別消耗7.84mW與7.2mW。

並列摘要


5th-generation (5G) massive multi-input multi-output (MIMO) communication has been developed recently in order to satisfy the demand of high data rate transmission by employing space division multiple access (SDMA). However, this architecture suffers from severe time variant channel loss and gain variation of antenna array, and automatic gain control (AGC) becomes an essential function in wireless receivers to equalize the strength of transmitted signal so that the required signal SNR and linearity for proper decoding can be met. As a critical component of AGC, programmable gain amplifier (PGA) with high reliability is required to ensure enough precision of gain control over wide process and temperature variations. This thesis is focused on the analysis and design of wideband, high-precision PGA with gain-error and temperature compensation for the receiver analog front-end. Two dB-linear PGAs with 3-bit and 5-bit digital control designed in a standard 90-nm CMOS process are presented. In these works, several techniques are employed such as the use of two pseudo-exponential approximations and gain-error-compensated switchable resistor networks for gain-accuracy enhancement, a modified Cherry-Hooper amplifier topology for bandwidth extension, and adaptive biasing circuit combined with bandgap reference for temperature compensation. According to the experimental results, the proposed PGAs can achieve a bandwidth of 1.2 GHz and a gain control range of more than 52 dB with small dB-linear gain error and gain deviation over -10°C~95°C while consuming 7.84 mW (3-bit PGA core) and 7.2 mW (5-bit PGA core) through 1.2-V supply.

參考文獻


[1]K. Bao, X. Fan, L. Tang, Z. Hua, Z. Wang, "A programmable gain amplifier for multi-mode multi-standard wireless receivers," Solid-State and Integrated Circuit Technology, 2014 12th International Conference, pp. 28-31.
[2]S. Shim, B. Koo, S. Hong, "A highly-linear CMOS RF programmable- gain driver amplifier with a digital-step differential attenuator for RF transmitters," in IEEE Radio Freq. Integr. Circuits Symp., Jun. 2013, pp. 455-458.
[3]Y. K. Hsieh, H. H. Hsieh, L. H. Lu, "A wideband programmable-gain amplifier for 60GHz applications in 65nm CMOS," VLSI Design, Automation, and Test, Apr. 2013, pp. 22-24.
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