CMOS鎖相迴路頻率合成器之研究與應用

The Design and Application of CMOS PLL-Based Frequency Synthesizers

張元泰(Yuen-Tai Chang)

指導教授 ： 呂學士

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2010年)

https://doi.org/10.6342/NTU.2010.01853

摘要

本論文共大分為二個部分，第一個部分為研製一個10/5/2.4 GHz的分數型頻率合成器，第二個部分為研製一個以分數型頻率合成器為架構之2.4GHz高斯頻率鍵移(Gaussian Frequency Shift Keying, GFSK)傳輸機。

論文中第一個部分為一個具有自動頻率校正之適用於10/5/2.4 GHz的多頻段分數型頻率合成器，藉由一鎖相迴路內之壓控振盪器VCO輸出第一個頻段，再經由動態除頻器輸出第二個頻段，最後再透過高速電流模式除頻器輸出第三個頻段以達成應用於10/5/2.4 GHz之通訊系統。

論文中第二個部分為一個以分數型頻率合成器為架構之2.4GHz高斯頻率鍵移傳輸機。此高斯頻率鍵移傳輸機採用8位元之數位三角積分器，高斯濾波器及一閉迴路鎖相迴路作為核心電路。也因採用閉迴路鎖相迴路架構及不需混波器，故此傳輸機系統具有好的相位雜訊、較低的電路復雜度等特性。

關鍵字：鎖相迴路 ，三角積分器，分數型鎖相迴路，頻率合成器，高斯頻率鍵移,傳輸機, 2.4GHz

關鍵字

鎖相迴路 ； 三角積分器 ； 分數型鎖相迴路 ； 頻率合成器 ； 高斯頻率鍵移 ； 傳輸機 ； 2.4GHz

並列摘要

In this thesis, we roughly divide two part, part one is a 10/5/2.4 GHz fractional-N frequency synthesizer with auto frequency calibration, part two is a 2.4GHz GFSK transmitter base on a fractional-N frequency synthesizer.
In part one, a 10/5/2.4 GHz multiband frequency synthesizer with auto frequency calibration (AFC). To achieve the application of 10/5/2.4 GHz communication system, the first band is directly output of VCO then through a super-dynamic divider output is the second band and then through a current mode logic divider output is the third band.
In part two, a GFSK transmitter have been designed and realized base on a 2.4GHz frequency synthesizer. this GFSK transmitter using a 8-bit delta-sigma modulator, Gaussian filter and a close loop phase lock loop. It has good phase noise, easy to implement due to the architecture of close loop and no mixer required.

Keywords: PLL, delta-sigma modulator, ∆∑fractional-N frequency synthesizer, GFSK, transmitter, 2.4GHz

並列關鍵字

PLL ； delta-sigma modulator ； ∆∑fractional-N frequency synthesizer ； GFSK ； transmitter ； 2.4GHz

參考文獻

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