考慮微影特性於曝光控制電路響應最佳化進而改善電子束微影曝寫速度之方法

Exposure control circuit response optimization method for improving throughput of electron beam lithography considering patterning fidelity

黃實權(Shi-Chuan Huang)

指導教授 ： 蔡坤諭

國立臺灣大學/電機資訊學院/電機工程學研究所/碩士(2012年)

https://doi.org/10.6342/NTU.2012.10657

摘要

在這樣一個微影技術迅速攀升的時代，由於電子束直寫（EBDW）微影系統解析度高、又無需光罩，便因此成為次世代的主流之一，但卻有著低曝寫速度之問題，於是曾有研究提出，利用大量的電子束所形成的多重電子束直寫（MEBDW）微影系統進而提升其曝寫的速度，也以多重電子束直寫微影系統裡的電子束驅動電路，控制一單閘極層的電子光學系統（EOS），進而調節電子光學系統之發射電流。然而，傳統的驅動電路設計只考慮到訊號品質（SF），也以實際電路以及其中包含很多變數之電路模擬，如電晶體長度和寬度，進而修正驅動電路的設計，使得傳統設計方式不僅未考慮微影之特性和曝寫速度的最佳化，在修正設計方面則更是耗時。因此提出一藉由轉移函數調整具有考慮微影特性之電子束微影曝光控制電路（ECC）最佳化曝寫速度之方法。此方法不僅於最佳化曝寫速度時考慮了微影品質（PF），更因電路部分被替換為轉移函數的型態，予以簡化曝寫速度在最佳化時所需調整的變數，更大幅降低最佳化所需耗費的時間。由結果可得知，不僅曝寫速度有著顯著的提高，更經由比對工業技術研究社 (ITRS) 當中21納米節點的規格，於各個微影結果上的線寬以及光阻厚度更是較於符合。

關鍵字

電子束直寫 ； 多重電子束直寫 ； 電子光學系統 ； 曝光控制電路 ； 訊號品質 ； 微影品質 ； 最佳化

並列摘要

Electron-beam-direct-write lithography is one of the promising candidates for next-generation lithography because of its ability of high resolution and maskless operation. Its issue of low throughput is improved by multiple-electron-beam-direct-write lithography. The emission current of an electron optical system (EOS) is controlled to decide whether the resist is developed because of relationship between it and the dose. Thus exposure control circuit (ECC) has been proposed for adjusting the emission current of an EOS. In the traditional design of ECC, a lot of variables are adjusted for meeting the requirement of signal fidelity (SF). It is verified by circuit simulation and experiments with the actual circuit. However, it lacks for throughput optimization. The patterning fidelity (PF) is not necessarily acceptable because the exposure results are verified after ECC design. In this work, a new method of ECC response optimization for improving throughput of electron beam lithography considering PF is proposed. The PF is considered for optimizing the throughput. Preliminary results indicate that the throughput is significantly improved, while theses resist profiles are met the International Technology Roadmap of Semiconductors requirements.

並列關鍵字

Electron-beam-direct-write ； Multiple-electron-beam-direct-write ； Electron optical systems ； Exposure control circuits ； Signal fidelity ； Patterning fidelity ； Optimization

參考文獻

[1] G. E. Moore, “Lithography and the Future of Moore’s Law”, SPIE Proc., vol. 2437, pp. 2-17, May 1995.

[2] See: International Technology Roadmap of Semiconductors, available at: http://www.itrs.net/.

[3] C. Klein, H. Loeschner, and E. Platzgummer, “50-keV electron multibeam mask writer for the 11-nm HP node: first results of the proof-of-concept electron multibeam mask exposure tool”, J. Micro/Nanolith. MEMS MOEMS, vol. 11, no. 031402, Aug. 2012.

[4] C. S. Silver, J. P. Spallas and L. P. Muray, “Sub- 100-nm lithography with miniature electron beam columns”, J. Vac. Sci. Technol. B, vol. 24, pp. 2945-2950, Nov. 2006.

[5] T. H. P. Chang, M. Mankos, K. Y. Lee and L. P. Muray, “Multiple electron-beam lithography”, Microelectron Eng., vol.57-8, pp. 117, Aug. 2001.