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  • 學位論文

具有輸出阻抗轉換之3-10GHz寬頻平衡式功率放大器

A 3-10GHz Broadband Balanced Power Amplifier with Output Impedance Transformation

指導教授 : 盧信嘉
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摘要


本論文研究應用於3-10GHz頻段之寬頻平衡式功率放大器,並且詳細介紹寬頻平衡式功率放大器之設計原理與流程。本論文搭配主動與被動製程來實現所設計的電路,主動電路部分以0.18微米製程搭配低溫共燒陶瓷被動製程,並且利用覆晶技術結合主動與被動製程來實現寬頻平衡式功率放大器。 本論文第一部分為單位功率放大器之設計部分,其設計使用電感與寄生電容(Cds)產生共振與單節匹配網路匹配到合適輸出端之負載25歐姆阻抗以避免為了匹配到50歐姆而設計出較複雜的匹配網路進而造成損耗。另外在輸入端加上阻抗調整網路進而調整S21之平坦度,並且使用負回授改善S11。 本論文第二部分設計兩組不同規格之寬頻九十度功率分配器,其輸出埠負載之設計分別為50歐姆及25歐姆。而輸出埠負載為25歐姆這組寬頻九十度功率分配器在寬頻平衡式功率放大器中被當作功率合成器使用,其被動電路之設計使得單位功率放大器之輸出埠負載能經由此功率合成器進行阻抗轉換到電路系統輸出端之50歐姆負載。 本論文最後部分結合單位功率放大器與寬頻九十度功率分配/合成器而組成寬頻平衡式功率放大器,其平衡式功率放大器原理能大幅度改善單位功率放大器設計中S11與S22不佳之問題。在單位功率放大器的量測部分,頻段內之|S21|為11.6±2.2dB,在OP1dB時之PAE為22%-35%,OP1dB為14.8-19.3dBm。

並列摘要


This thesis investigates the broadband balanced power amplifier operating from 3GHz to 10GHz. Both the design method and procedure of this balanced power amplifier are presented in detail. TSMC 0.18um CMOS is selected as the active process to design unit power amplifiers, and low temperature co-fired ceramics (LTCC) is used as the passive process to design two types of quadrature power splitters (QPS). The broadband power amplifier was achieved by using flip-chip interconnects to combine T18 chips with LTCC substrate. The first part of this thesis shows the design of the unit power amplifier using CMOS 0.18um process. By using an inductance and parasitic capacitances (Cds) to produce resonance and using unit matching network to the 25ohm load impedance of output port, the output networks can be simplified and reduce unnecessary loss if designed for load. S21 can be regulated much more flat by adding the impedance transform network at input part. Negative feedback network is also added to improve return loss. The second part of this thesis presents two kinds quadrature power splitters, one for output load of 50ohm, and the other one for 25ohm. The quadrature power splitter with output load of 25ohm acts as power combiner for unit amplifiers, and transform to system’s output impedance of 50ohm. Finally, this thesis combines unit power amplifier with broadband quadrature power splitter/combiner to form a broadband balanced power amplifier which can improve return loss greatly. The measurement results of the unit amplifier show that at 3-10GHz, it achieves gain of 11.6±2.2dB, PAE at OP1dB 22%-35%, and OP1dB of 14.8-19.3dBm.

參考文獻


[24] 劉康旬, "3-10 GHz 寬頻平衡式功率放大器," 臺灣大學電子工程學研究所碩士論文, 臺灣大學, 2013.
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被引用紀錄


張辰暉(2015)。由包含貫穿孔之微波多層電路佈局圖中萃取電路圖〔碩士論文,國立臺灣大學〕。華藝線上圖書館。https://doi.org/10.6342/NTU.2015.02132

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