P型氧化亞錫薄膜電晶體效能與穩定性之研究

An Investigation of the Performance and Stability of P-Type Tin Monoxide Thin-Film Transistors

涂民昇(Min-Sheng Tu)

指導教授 ： 陳奕君

國立臺灣大學/電機資訊學院/光電工程學研究所/碩士(2014年)

https://doi.org/10.6342/NTU.2014.10844

摘要

本論文以氧化亞錫薄膜為主題，研究在不同的沉積環境與退火溫度下，所表現出的薄膜特性與成分，並且進一步以氧化亞錫薄膜製備出p型薄膜電晶體，並將其薄膜特性與元件性能做相對應的關係，進而針對電晶體之電穩定性作探討，且透過適當的背通道鈍化層方式，提出了成功改善電晶體元件穩定性之方法。
本論文採用射頻磁控濺鍍作為製備氧化亞錫之方法，以金屬錫作為濺鍍靶材，藉由控制濺鍍時的氧氣流量比例，作為調變氧化亞錫薄膜中的錫氧成分比例。本研究也透過控制濺鍍工作壓力，觀察氧化亞錫薄膜隨之產生的變化，且針對不同退火溫度，找出其最佳條件。從低掠角X光繞射分析得知，當氧氣流量比例上升時，退火後氧化亞錫薄膜之晶粒粒徑呈現漸減之趨勢，且結晶方向由(110)逐漸轉為(101)為主要結晶方向。電晶體方面，則會隨著濺鍍氧化亞錫時氧氣流量比例的提升，造成場效遷移率的下降。隨著氧化亞錫濺鍍工作壓力的提昇氧化亞錫也會有結晶方向的消長現象，同時晶粒粒徑呈現漸減之趨勢。根據X光光電子能譜分析的結果，可以推論隨著濺鍍工作壓力的提升，Sn0成分逐漸降低，而Sn4+成分逐漸上升，混合相造成了晶粒粒徑的下降，Sn4+成分的增加會導致氧化亞錫薄膜結晶性的劣化，進而影響到氧化亞錫薄膜的晶粒粒徑。電晶體隨著氧化亞錫濺鍍工作壓力的提升，場效遷移率呈現漸減之趨勢，但電流開關比則會有漸增之跡象。
退火溫度的提升有助於薄膜晶粒粒徑的增加，但當溫度超過230 °C之相轉換區間時，氧化錫成分的增加將導致薄膜結晶性的劣化，進而使晶粒粒徑急遽下降。元件方面，隨著退火溫度的上升，在225 °C時會出現最高之場效遷移率、最大的電流開關比，當退火溫度繼續往上提升時，電流開關比將會急遽的下降，同時場效遷移率也出現降低的趨勢。
接著於偏壓/偏流穩定性中，電晶體元件並無明顯之次臨界擺幅變化，主要造成的影響在於臨界電壓的偏移，而其機制來自於電荷捕捉。在負偏壓與正偏壓測試中，正偏壓造成的臨界電壓偏移量比負偏壓來的大，原因可能來自於未封裝之背通道層與大氣中水氣及氧氣反應所致。為此，以氮化矽/氧化鉿之雙層鈍化材料做為背通道鈍化層則能成功的改善元件之穩定性，並維持元件的性能表現。

關鍵字

氧化亞錫 ； 薄膜電晶體 ； 鈍化層 ； 偏壓穩定性

並列摘要

P-type tin monoxide (SnO) thin films were sputter-deposited at room temperature under various deposition conditions. The influence of post-annealing temperature, sputtering pressure, and O2/Ar ratio of sputtering atmosphere on the properties of post-annealed SnO thin films were investigated. Various SnO thin film transistors (TFTs) were then fabricated and examined. Furthermore, we also demonstrated that the gate-bias and current stability of the thin-film transistors (TFTs) can be improved with SiNx/HfO2 stack layer as the back-channel passivation.
SnO thin films were sputter-deposited from pure Sn target at room temperature under various O2/Ar flow ratios. As the O2/Ar flow ratio increased, the preferred orientation was transferred from SnO (110) to SnO (101) after the films were annealed in air at 225 °C for 30 min. Meanwhile, the grain size of SnO film decreased and the field-effect mobilities of fabricated TFTs decreased.
The phase of SnO film is extremely sensitive to the deposition pressure. According to XPS results, the increase of Sn4+ component and the gradual disappearance of the Sn0 component were identified as the deposition pressure increased, indicating the partial transformation to SnO2; in the meantime, the crystallinity decreased. The grain size calculated from the highest XRD peak based on the Scherrer formula decreased from 35 nm to 18 nm as the deposition pressure rose from 3 to 6 mTorr; this is considered as one of the reasons for the decrease of mobilities for SnO TFTs fabricated under high sputtering pressure.
The disproportionation reaction of SnO generally starts at around 350-500 °C, Sn4+/Sn2+ component ratio significantly increases as the annealing temperature exceeds 225 °C, which is also the critical temperature to acquire largest grain size for the SnO films. Further increasing the annealing temperature degrades the crystallinity.
Based upon the XPS and GIXRD results, we concluded that the room-temperature as-deposited SnO films were X-ray amorphous. The TFTs made by as-deposited films revealed extremely low level of current conduction. No switching behavior was observed. Annealing at a temperature < 225 °C upon SnO films induced crystallization and improved the field-effect mobilities of SnO TFTs. Annealing at a temperature > 225 °C might lead to phase change with reduced grain size, which thereby reduced field-effect mobilities of TFTs. As SnO2 became the dominant phase of the films, free electrons compensated holes; as a consequence, undesirable n-type like films were obtained.
We further tested the influence of SiNx/HfO2 back-channel passivation layers on the gate-bias and current stress stability of bottom gate SnO TFTs. The threshold voltage shifts under positive gate-bias stress were +1.24 V and +0.75 V for the unpassivated and passivated TFTs, respectively. For the current stress experiment, the threshold voltage shifts were -0.63 V and -0.29 V for the unpassivated and passivated TFTs, respectively. This could be attributed to the suppression of bias-induced adsorption of oxygen on the backchannel surface by using SiNx/HfO2 as passivation layers.

並列關鍵字

tin monoxide ； thin-film transistor ； passivation ； gate-bias stress stability

參考文獻

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