感應式變排量液壓系統硬體迴路即時模擬矽智財的設計與實現

Real-Time Digital Hardware Simulation of the Hydraulic System Module

陳柏宏(Po-Hung Chen)

指導教授 ： 陳中平

共同指導教授 ： 陳培殷 ； 林浩庭(Hao-Ting Lin)

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2018年)

https://doi.org/10.6342/NTU201800614

摘要

在設計複雜大型機械系統的時候，為了達到精準度，模擬速度，以及效率的需求。本論文採用硬體迴路設計得概念(Hardware in the Loop, HIL)，實現一個應用於可變排量液壓系統的模組(Hydraulic System Module, HSM)。
首先，為了實現可變排量液壓系統的即時性，提出了一種精確的數學模型，然後將此模型實作於電路上，並在ASIC上實現最後將結果與硬體相比較，驗證此想法的可行性，以得到更多的即時資訊，開發更高動態精準度性能的控制器。
據我們所知，提出的HSM電路是第一個實現於特殊應用積體電路（ASIC），並沒有相關的設計存在於文獻中。
根據量測結果，在ASIC版本從0.2 s改善到1.2μs，改良了166,666倍。而在FPGA-58bits版本從0.2 s改善到155ns，改良了1,920,322倍，平均誤差小於0.01，證明此設計滿足高精準度，以及模擬速度的要求，在使用TSMC 0.18微米CMOS製程實現的可變排量液壓系統模組，晶片面積為0.949 × 0.949 mm2，實際電路面積為 0.566 × 0.566 mm2，在1.8V供應電壓下，量測的頻率為62.4 MHz，每筆資料的處理時間為1,280 ns。

關鍵字

液壓系統 ； 硬體迴路 ； 特殊應用積體電路 ； 建模

並列摘要

In the design of a large, high complexity mechanical system, trade-off among accuracy, simulation speed and efficiency requirements is a challenge. In this work, the hardware in the loop (HIL) is used to implement a Hydraulic System Module (HSM) for a variable displacement hydraulic system.
First of all, in order to achieve the immediacy of variable hydraulic system, an accurate mathematical model is proposed. Then, realize the model on the circuit and implement it on ASIC. Finally, the result is compared with the hardware to verify the feasibility of this idea. Develop controllers with higher dynamic accuracy performance with real-time information.
To the best of our knowledge, the proposed HSM is the first application-specific integrated circuit (ASIC) implementation, and no related state-of-the-art ASIC design exists in the literature.
A variable displacement hydraulic system is presented. Designed and fabricated in 0.18-μm CMOS technology. Based on the measurement results, the ASIC version was improved from 0.2 s to 1.2 μs, an improvement of 166,666 times. The FPGA 58bits version improved from 0.2 seconds to 155ns, an improvement of 1,920,322 times, with an average error of less than 0.01, proving the design meets high accuracy and simulation speed requirements. Moreover, the chip area is 0.949 × 0.949 mm2, the core area is 0.566 × 0.566 mm2, an operation frequency is 62.4 MHz, propagation delay time 1280 ns and power consumption is 6.26 mW from a 1.8-V supply.

並列關鍵字

Hydraulic system ； HIL ； ASIC ； modeling ； implementation

參考文獻

[1] Peter A. Stricker, "Aircraft Hydraulic System Design", https://zh.scribd.com/presentation/240627951/Aircraft-Hydraulic-System-Design.

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[4] Claudio Melchiorri, "Trajectory Planning for Robot Manipulators", Dipartimento di Elettronica, Informatica e Sistemistica (DEIS), Universit`a di Bologna.

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