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摘要


本論文中,我們提出利用快熱製程進行晶圓直接鍵結製程,成弗N矽晶圓與矽晶圓或矽晶圓與另一片原已覆遘N磷矽玻璃絕緣層之矽晶圓鍵結起來。利用快熱製程進行晶圓直接鍵結,升溫過程僅需約30分鐘,大幅降低製程時間,可達到快速晶圓直接鍵結之目的。 本論文研究之結合晶圓鍵結與氫離子佈植技術,係利用高能量的氫離子植入寄生晶圓至適當深度,其中調整氫離子佈植的劑量與能量,佈植劑量的多寡會影響晶圓分裂開的退火溫度,而佈植的能量便是決定晶圓分裂開的深度。接著利用晶片黏接技術將寄生晶圓與已成長一氧化層之承載晶圓在低溫或室溫黏合。粘合後之矽晶圓經過高溫處理,原植入之氫離子層會受高溫作用,在植入深度處將兩晶圓分裂開,因此承載晶圓在氧化層上存在可製作元件的作用區矽薄膜。此技術亦可延伸於異質材料應用和製作。 透過一個獨特的絕緣層,所發展出的絕緣層晶片製程將可以可以減少寄生電容效應及降低元件的漏電流,因此元件的必v消耗可大幅降低,並可提升運算效能。利用結合晶圓鍵結與氫離子佈植技術製程與磊晶設計,我們成本s作出兼具應變矽與絕緣層晶片優點的絕緣層上應變矽晶圓。利用結合晶圓鍵結與氫離子佈植技術製程製作之絕緣層晶片,可清楚看出在700nm的硼磷酸玻璃絕緣層上依序存在100nm無缺陷之矽鍺層與矽層。將絕緣層晶片表面矽層薄化後高溫退火,可獲得該絕緣層上應變矽晶圓,該拉曼分析顯示隨著高溫退火製程,矽鍺逐漸鬆弛,而其上之矽則逐漸受到應變。 結合晶圓直接黏合技術與膜層轉移技術,利用硼磷矽玻璃在800℃以上高溫為半黏滯狀態之特性,在具高溫時呈黏滯態特性之半導體基板上成長受壓縮應變之平板薄膜。經高溫處理,呈黏滯態基板上之受壓縮應變平板薄膜欲橫向伸展以釋放晶格應力,遭呈黏滯態基板施與相反方向之反作用力而使平板薄膜呈現二維皺曲量子井現象,在半導體上形成二維皺曲量子井層。

關鍵字

應變矽 應變矽鍺 絕緣層

並列摘要


In this thesis, the directly hydrophilic wafer bonding method is achieved by rapid thermal process. A Si wafer is successfully bonded to another Si wafer capped with 700 nm BPSG by the rapid thermal process. The rapid thermal process strength the chemical bonds between the two wafers. In this process, we can shorten the anneal time down to 30 minutes. Then we propose a method for forming strained Si on relaxed SiGe on insulator by smart-cut process and direct wafer bonding. It is described incorporating growing epitaxial SiGe layer on a semiconductor substrate, implanting hydrogen ions into the host wafer substrate to form an in-depth weaken layer, bonding two substrates together via thermal treatments and layer transfer taking place along the in-depth weaken layer by H2 blistering at high temperature treatment. The strained Si layer on separated substrate may thin down by chemical etching or CMP process, and have strain-enhanced via high temperature annealing. Finally, the 2-D buckled SiGe quantum wells of elastic film on semiconductors are obtained by wafer bonding and layer transfer techniques. It is described incorporating epitaxially growing pseudomorphic SiGe layer on a viscous substrate, then with high temperature treatment. Lateral thermal expansion and counterforce by viscous substrates produce compressive during thermal annealing treatment. One approach to relieving compressive stresses in thin semiconductor films is to bend them out of the nominal plane by viscous flow at temperatures above the glass transition temperature. 2-D buckled SiGe quantum wells via high temperature oxidation.

並列關鍵字

buckling SGOI strained SiGe wafer bonding strained Si H implant

參考文獻


The International Technology Roadmap for Semiconductors (ITRS), 2001 edition.
Fair Assaderaghi and Ghavam Shahidi, Proc, IEEE Intl. SOI Conf., 6 (2000).
Hongchin Lin, Jemin Lin and Robert C. Chang, IEEE Electron Device Letters, vol. 24, No. 2, pp. 111-113 (2003).
J. P. Colinge, Proc. Int. Electron. Device Meet. 817 (1994)
F. A. Kish, Proc, IEEE, 85, 1752, (1997)

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