This thesis proposes a new geometric implementation of distributed-RC lines using thin metal wires in modern 1P6M 0.18um CMOS process. These distributed-RC lines are designed on the basis of synthetic transmission lines. Immediately after providing mathematical models for those lines, a passive notch filter occupying 80um by 65um chip area with 2.4GHz null frequency is designed and tested. Moreover, one 280-MHz active distributed-RC band-pass filter occupying 370um by 420um chip area is also implemented to verify concepts of those lines. The measured results of these two filters show feasibility of distributed-RC lines on CMOS process. Finally, design of an active low-pass filter is given in the end of this thesis.