摘要
在本篇論文裏，第一章我們會先介紹為什麼要探討氮化鎵元件傳播特性的動機。在第二章，有限元素法解帕松和漂移-擴散方程式的演算法會被詳細的推導，然後利用這些方程式來探討元件的電性。此外，蒙地卡羅光軌跡技術和熱傳導方程式也會一併介紹。本篇論文旨在結合電、光、和熱三種模擬來準確的模擬半導體元件。第三章到第五章的內容為探討不同型態的發光二極體，提供完整的分析給元件設計者。在第六章，氧化鎵/氮化鎵奈米線電晶體會被拿來探討尺度原則和相關的短通道效應。 第三章主要為分析垂直發光二極體的電流擴佈和光取出效率。我們測試了不同的電極配置，找出電流擴佈的最佳化來抑制量子井裏平均載子濃度和減少在高電流注入下時的效率衰退。藉由在不同情況下光電轉換效率的計算討論，可以得到如何獲得高能量轉換效率的設計準則。在第四章，分成上出光式和下出光式的水平發光二極體來探討。我們同時採用模擬結果和電路模型來分析電流擴佈，結果顯示，均勻的透明導電極沒有辦法真的讓電流擴佈非常的均勻。因此，調變透明導電極會被測試來進一步改變電流擴佈的效果。在不同電流注入時，產生的電流擁擠效應和電流路徑改變也會一起討論。此外，我們會比較下出光式發光二極體和上出光式發光二極體的電流擴佈和光取出效率，並討論下出光式發光二極體的優點。發光二極體在高電流下的衰退效應的分析結果會被用來驗證我們的想法，而本章節主要在提供如何實現高效能水平式發光二極體的完整分析和概念。 在第五章，內容主要是核殼型多量子井奈米線發光二極體的研究結果。因為核殼型奈米線發光二極體比傳統的平面發光二極體有更大的主動區，以及在非極性量子井裡較強的複合，所以核殼型奈米線發光二極體會表現出較弱的衰退效應。電流擴佈效應也被計算來確定載子在核殼型奈米線發光二極體側壁的分布，結果顯示，藉由增加奈米線的高度得到更大的深縱比，可以增加非極性主動區的體積，使其在相同的電流密度下，電子密度相對較低，以減少衰退效應。所以讓電流擴佈長度超過奈米線的高度來有效利用非極性量子井是很重要的，因此，適當的透明導電層可能是必要的。此外，我們對每個奈米線之間，不同間距的影響和其相對應的奈米線直徑提出了討論。並且，側壁不均勻的銦濃度分布和不同電流注入情況下的電流擁擠效應會在此章節的最後作分析。在第六章，三維尺度的有限元素法程式被用來研究氧化鎵/氮化鎵奈米線電晶體的性能。我們提供了模擬結果來與50奈米閘極長度的奈米線實驗結果作比較，兩者也表現出良好的一致性。更短的閘極長度（<50 奈米）也被拿來研究其性能和縮放的問題，以及對短通道效應進行了分析。在有更好的環繞閘極設計和凹陷閘極的方法，20奈米閘極長度的最佳條件會在本論文中探討。
並列摘要
In this dissertation, we will introduce the motivation in studying transport properties of GaN-based devices at first in Chapter 1. In Chapter 2, the algorithm for a fully self-consistent model that solves Poisson and drift-diffusion equations by the finite element method to investigate device electrical properties was derived in detail. In addition, the Monte Carlo ray-tracing technique and heat conduction equation were introduced as well. The goal of this dissertation is combining the electrical, optical, and thermal aspects to model semiconductor devices precisely. In Chapter 3-5, various types of light emitting diodes (LEDs) were studied to give a thorough analysis for designers. In Chapter 6, the Ga2O3/GaN nanowire transistor was examined to discuss the scaling rules and related short-channel effect. In Chapter 3, the current spreading effect and light extraction efficiency (LEE) of vertical LEDs were analyzed. We tested different electrode configurations in the vertical LED to optimize the current spreading effect, which in turn suppresses the average carrier density in the quantum well and reduces the efficiency droop under high injection conditions. The wall-plug-efficiency in overall cases to identify the design rules for higher power conversion efficiency will be discussed as well. In Chapter 4, lateral LEDs were investigated with top and bottom emission conditions. The simulation results and circuit model were both used, which indicate that a uniform transparent conducting layer (TCL) cannot achieve a very uniform current spreading effect. Thus, modulating the TCL is tested to further improve the current spreading effect. Different current injecting conditions were discussed to observe the variation of the current flow path and the emerged current crowding effect. In addition, we will discuss the advantage of bottom emission LEDs by addressing the current spreading effect and LEE compared to top emission LEDs. The droop effect was also examined to verify our discussion. A thorough analysis provides deep insights for achieving high efficiency lateral LEDs in this chapter. In Chapter 5, the findings of investigating core-shell multiple quantum well nanowire LEDs were presented. The core-shell nanowire LED showed a weaker droop effect than that of conventional planar LEDs because of a larger active area and stronger recombination in nonpolar quantum wells (QWs). The current spreading effect was examined to determine the carrier distribution at the sidewall of coreshell nanowire LEDs. The results revealed that a larger aspect ratio by increasing the nanowire height could increase the nonpolar-active area volume and reduce the droop effect at the same current density. Making the current spreading length exceed a greater nanowire height to utilize the nonpolar QW effectively is critical. Therefore, an appropriate TCL might be necessary. In addition, we presented a discussion on the influences of the spacing between each nanowire on corresponding nanowire diameters. Moreover, the non-uniform indium distribution along the sidewall and different current injections were analyzed for the current crowding effect in the end of Chapter 5. In Chapter 6, a three-dimensional finite element solver was applied to investigate the performance of Ga2O3/GaN nanowire transistors. We provided the simulation results to compare with experimental nanowire results of 50 nm gate length, and they show good agreement. The performance of a shorter gate length (<50 nm) was studied and scaling issues of the short-channel effect are analyzed. With a better surrounding gate design and a recessed gate approach, the optimal conditions for a 20 nm gate length were explored in this dissertation.