低雜訊耦合器及電流模式之接收機射頻前端電路設計

The Design of a Low-noise Coupler and a Current-mode RF Front-end

高來蘇(Lai-su Gau)

指導教授 ： 林宗賢

國立臺灣大學/電機資訊學院/電子工程學研究所/碩士(2019年)

https://doi.org/10.6342/NTU201900167

摘要

本論文實現了一操作在電流模式之射頻前端電路，接收機包含低雜訊放大器，混頻器，電流電壓轉換器以及輸出級放大器。低雜訊放大器內結合耦合器之設計，使得放大器輸出即有I/Q兩路。本設計輸入端操作在12 GHz，而輸出端設計在40 MHz，系統的供應電源為2.0-伏，並使用聯電55奈米製程。總系統增益為36.68 dB，雜訊指數為9.79 dB，三階輸入截止點在-16.13 dBm，共消耗69.2 毫瓦特之功率。I/Q兩路之增益差為1.35 dB，相位差為98度。
為了降低於前一接收機中使用的耦合器之雜訊比，本論文將傳統接在耦合器的截止埠之電阻，改為一主動式電路。此低雜訊指數之耦合器操作在12 GHz，並使用聯電0.18微米製程。與傳統之電阻截止之連接方式相比，此主動電路之截止可將雜訊指數降低1.1 dB，由原先之3.7 dB降低至2.6 dB，並同時消耗6.1毫瓦特之功率。

關鍵字

低雜訊耦合器

並列摘要

A current-mode RF front-end and a low-noise coupler is proposed in this thesis. The current-mode RF front-end operating at RF frequency of 12 GHz and IF frequency of 40 MHz with low-noise transconductance amplifier (LNTA), mixer, transimpedance amplifier (TIA) and output driver stages with 2.0-V supply. The LNTA is designed with a passive coupler to create I/Q path before the mixer stage. The RF front-end is implemented in UMC 55-nm CMOS technology. The RF front-end achieves 36.68 dB gain, 9.79 dB noise figure, -16.13 dBm IIP3, 69.2 mW power consumption. The gain imbalance between I-path and Q-path is 1.35 dB, and the phase imbalance is 8 degrees.
A low-noise coupler, lumped-element coupler with active termination, is proposed to lower the noise figure of the coupler. The low-noise coupler is designed to operate at RF frequency of 12 GHz and implemented in UMC 0.18-um CMOS technology. An active termination circuit is proposed to replace the traditional resistive termination to reduce the noise figure. Comparing the same coupler with traditional resistive termination to active termination, the noise figure improved from 3.7 dB to 2.6 dB while consuming 6.1 mW.

並列關鍵字

Low-noise coupler

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