矽穿孔通道引發應力之特性研究及其抑制/調變結構

Study of the Characteristic of the Stress Induced by Through-Silicon Via and the Stress Constraint/Modulation Structure

高思介(Ssu-Chieh Kao)

指導教授 ： 廖洺漢

國立臺灣大學/工學院/機械工程學研究所/碩士(2014年)

https://doi.org/10.6342/NTU.2014.02593

摘要

本論文以數值模擬的方式來觀察三維積體電路中的矽穿孔通道周圍之熱應力，並佐以壓阻係數來換算此應力造成之矽基板載子遷移率變化率。目的是縮小載子遷移率變化率過大而被定為禁止擺放元件的排除區域。在考慮矽基板材料非等向性的狀況下，證實當矽穿孔通道在規則擺放時其陣列排列方向與元件電流通道夾角控制之重要性，並在觀察矽穿孔通道受到軸向力時對周圍矽基板施力模式的改變，進而提出逐層固定矽穿孔通道的可能應用方案。在討論現有解決矽穿孔通道產生之熱應力問題的方法後，針對不接觸矽穿孔通道本體的封閉式空氣隙技術，我們亦提出朝開放式改進的可能方向。

關鍵字

熱應力 ； 矽穿孔通道 ； 三維積體電路 ； 有限元素法 ； 壓電效應

並列摘要

In this work, numerical simulation was used to predict the thermal stress and keep-out zone defined as where carrier mobility changes too much for the devices to turn on. By considering the anisotropic characteristics of the silicon, it is thought that the angle between the rows of through-silicon via array and the direction of the devices’ channel is a very important parameter. By the simulated stress pattern changed by applying tensile stress along the axis of TSV, a model of the confinement of the motion of the TSV’s surface, leading to the reduction of the area of the keep-out zone, was proposed and verified. Last, we proposed a non-enlosed air-gap structure to improve the existing enclosed one.

並列關鍵字

thermal stress ； through-silicon via ； three-dimensional integrated circuit ； finite element method ； piezoelectricity

參考文獻

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