透過您的圖書館登入
IP:3.22.171.136
  • 學位論文

矽/鍺基板光聲子與金氧半電容元件之應變探討

Si/Ge optical phonons and Strain-induced effect on MOS capacitor

指導教授 : 劉致為

摘要


本論文中,我們探討了應變矽(strained-Si)所造成之物性以及電性之改變,可分為以下兩大部分:第一部分為探討應變矽基板對於顯微拉曼光譜儀(micro-Raman spectroscopy)所觀察到矽原子間振動聲子頻率(phonon frequency)的改變。第二部分為以應變矽為基板之金氧半電容(MOS capacitors)元件造成的平帶電壓(flat-band voltage)之變化。作此研究目的在於現今金氧半場效電晶體(MOSFETs)的電流特性在應變技術的配合之下,會隨著通道的方向及施加應力方向的改變而有顯著的不同。而應變技術在微小尺寸下往往無法藉由有效且快速的方法測得應變矽所受到的應力程度,所以藉由(1)了解及觀察應變矽原子之間的聲子振動改變來預測其應變量,以及(2)應用單軸與雙軸應變技術於不同基版方向的矽基金氧半電容,來觀察矽的導電帶(conduction band)及價電帶(valence band)的移動皆是有潛力快速檢測受應變程度的方法。 第一部分中,我們針對顯微拉曼光譜儀所觀察到的矽原子振動聲子頻率改變,將先利用現有的模型Keating model來解釋顯微拉曼光譜儀(micro-Raman spectroscopy)所量測到矽基板在不同位置下(Γ、X、L points)的聲子峰值。而被觀測的峰值藉由模型的預測,可以得到所觀測峰值的相關參數(Grunesien parameters),藉由此數值推論出矽基板在應變下,所用到之振動常數。為了預測計算出矽基板受應力後對於聲子振動峰值的影響,在實驗上先利用拉曼紅移來觀察應變矽所受應力程度,與理論上解出的聲子振動方程式特徵值改變來互相驗證雙軸應變及單軸應變,其應變對於矽基板中的聲子頻率改變是否對於不同基板方向上有不一樣的常數比例關係,藉由比例關係得到了不同基板方向上的所受應力程度。過程中對於應變和應力的轉換、彈性常數、以及振動常數,都用到了廣義的張量分析與座標轉換。同時,單軸應變的邊界條件(boundary condition)則是採用了stress-free的假設。最後比較此預測關係式所測出受應力程度與ANSYS模擬軟體的一致性。 第二部分中,我們則是針對應變矽(strained-Si)為基板的金氧半電容(MOS capacitors)元件,觀測其應變後造成平帶電壓(flat-band voltage)之變化,推論出導電帶(conduction band)及價電帶(valence band)隨應變而造成不同的偏移情形。在實驗上,我們利用了應變機構來施加外在雙軸和單軸的拉伸(tensile)應變。在外加應變之下,量測金氧半電容元件(製作於(110)基版方向上)的平帶電壓(flat-band voltage)的移動。可以觀察到應變矽的導電帶(conduction band)及價電帶(valence band)會隨著施加不同應變於不同基板方向上而有程度上及方向上的不同。對於平帶電壓的變化,我們整理了單軸以及雙軸應變,並針對其偏移情況探討其物理現象是否符合應變矽的能帶理論。

並列摘要


In the thesis, we investigate the change of the physical and electrical properties based on Stained-Si. The thesis classifies two major sections:The first section is that we consider the variation of vibration phonon frequency between atoms in Strained-Si observed from micro-Raman spectroscopy. The other is that the flat-band voltage variation of MOS capacitors in Strained-Si. We consider the research purpose that the current property changed obviously with the stress directions on different channel under the strain technology. Because it is not effective and rapid to measure the stress degree of the Strained-Si under slight scale, we observe the change of vibration phonon frequency to predict the stress degree and then we also apply uniaxial and biaxial strain to MOS capacitors in different orientation Strained-Si to observe the shrinking of Silicon conduction band and valence band. The methods are potential to inspect stress degree quickly. The first, we focus on the change of vibration phonon frequency in Silicon observed from micro-Raman spectroscopy and employ the current model, Keating model, to explain the phonon vibration frequency peak at different Brillouin zone(Γ、X、L points).We also rely on the model to obtain the related parameters (Grunesien parameters) of the observed peak and infer the vibration constant from the parameters for Strained-Si. In order to calculate the effect of the vibration phonon frequency of the strained-Si, we start to observe the Raman shift in the experiment and we solve the eignvalue of the vibration equation to verify the biaxial and uniaxial strain. There are different constant ratio coefficient b between Raman-Shift and strain. We can received the stress degree from the constant ratio for different orientation substrate. The stress-strain transforms and the vibration constant is calculated by general tensor analysis and coordinate transform for different orientation substrate. At the same time, we assume the stress-free boundary condition for uniaxial strain. At last, we use ANSYS to simulate the stress degree and compare the error with the coefficient b. The second, we focus on the flat-band voltage variation of MOS capacitors in Strained-Si. We observe the change of the flat-band voltage to infer the different shrinking of the conduction band and valence band under strain. In the experiments, we exploit the strain mechanism to exert uniaxial or biaxial tensile strain. Under the deformation, we measure MOS capacitors in Strained-Si fabricated on the three directions (Silicon (110)). We also observe the the shrinking of the conduction band and valence band with different strain on different substrate. For the change of the flat-band voltage, we adjust the uniaxial and biaxial strain and focus on the shrinking to discuss with the physical phenomenon and confirm the deformation potential theory.

參考文獻


[1] H. Miyata, T. Yamada, and D. K. Ferry, “Electron transport properties of a strained-Si layer on a relaxed Si1-x Gex substrate by Monte Carlo simulation,” Appl. Phys. Lett., vol. 62, pp. 2661–2663, 1993.
[2] K. Rim, J.Welser, J. L. Hoyt, and J. F. Gibbons, “Enhanced hole mobilities in surface-channel strained-Si p-MOSFETs,” in IEDM Tech. Dig.,1995, pp.517–520.
[3] S. Thompson et al., “A 90 nm logic technology featuring 50 nm strained silicon channel transistors, 7 layers of Cu interconnects, low k ILD, and 1 mm 2 SRAM cell,” in IEDM Tech. Dig., 2002, pp. 61–64.
[4] J. Goo et al., “Scalability of strained-Si n-MOSFETs down to 25 nm gate length,” IEEE Electron Device Lett., vol. 24, pp. 351–353, Apr. 2003.
[5] K. Rim et al., “Characteristics and device design of sub-100 nm strained-Si N- and PMOSFETs,” in Symp. VLSI Tech. Dig., 2002, pp.98–99.

延伸閱讀