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  • 學位論文

偏好引導的自動測試圖樣產生器及其應用

Preference-Guided Automatic Test Pattern Generation and Its Application

指導教授 : 黃俊郎

摘要


自動測試圖樣產生 (Automatic Test Pattern Generation, ATPG) 在超大型積體電路 (Very Large Scale Integrated Circuit, VLSI) 製造測試過程中發揮著重要的作用,隨著積體電路的應用越來越多,確保其可靠性也變得更重要,測試的方式會因使用情景而有所差異,往往需要對ATPG進行更多的客製化設定以滿足這些要求,常規的方法是通過約束ATPG的搜尋空間來達成目的,然而我們發現這在許多應用中還是不夠的,因此我們需要讓ATPG有更彈性的策略來產生測試圖樣。本論文提出一個可以容易地被實現到傳統演算法的偏好表示法。並且使用本論文提出的偏好引導的自動測試圖樣產生器可以有效率地產生具有輸入和輸出偏好的測試圖樣。我們也提出部分位移的測試應用方案,並展示對其使用偏好引導的自動測試圖樣產生的結果,我們可以維持錯誤涵蓋率並降低測試功率。

並列摘要


Automatic test pattern generation (ATPG) plays an important role in the manufacturing testing process of very large-scale integrated circuits (VLSI). With more and more applications of integrated circuits (IC), ensuring their reliability has become more important. The test methods will vary with different usage scenarios. It is often necessary to make more customized settings for ATPG to meet these requirements. The conventional method is to constrain the search space of ATPG to achieve the goal. However, we found that this is still insufficient in many applications. Therefore, we need more flexible ATPG. This thesis proposes a preference representation that can be easily implemented into traditional algorithms, and a preference-guided automatic test pattern generation that can effectively generate test patterns with input and output preferences. We also propose a partial shift test application scheme, the experiment results show that using preference-guided ATPG can maintain the fault coverage and reduce the test power.

參考文獻


[1] P. Goel, "An Implicit Enumeration Algorithm to Generate Tests for Combinational Logic Circuits", in Transactions on Computers, 1981, pp. 215-222.
[2] J. P. Roth, "Diagnosis of Automata Failures: A Calculus and a Method," in IBM Journal of Research and Development, 1996, pp. 278-291.
[3] Fujiwara and Shimono, "On the Acceleration of Test Generation Algorithms," in IEEE Transactions on Computers, 1983, pp. 1137-1144.
[4] T. Larrabee, "Test pattern generation using Boolean satisfiability," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1992, pp. 4-15.
[5] L.T. Wang, C.W. Wu, and X. Wen, VLSI Test Principles and Architectures, Morgan Kaufmann, 2006

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