電荷汲取技術於多晶矽薄膜電晶體及n型鍺通道金氧半場效電晶體之研究

Characteristics of poly-Si TFTs are greatly influenced by the grain boundary traps. Therefore, it is very important to investigate the grain boundary trap properties in poly-Si TFTs. Charge pumping techniques are suitable for derive more accurately the grain boundary trap properties by measuring the current directly related to the traps where the recombination processes occur. It is better than other method based on measuring the channel current, which is affected only through the potential barrier formed by the traps at the grain boundaries. In this thesis, geometric effects are studied. Then, measurement pulse conditions are optimized to suppress the geometric effects, which may affect the accuracy of the estimated trap density. A method to distinguish between the interface traps and grain boundary traps from the charge pumping current, which is contributed from both types of traps, is proposed. Energy distribution of them is also obtained. It is correspond with previous works that grain boundary trap distribution has a deep-level Gaussian distribution with a maximum near the midgap and an exponential-like band tail near the band edges, whereas interface trap distribution has an exponential-like distribution increasing toward the band edges. Besides, the drain avalanche hot carrier (DAHC) effect is also investigated. Due to the high electric field in the drain region, carriers which acquire extra energy from the field undergo impact ionization and generate hot electron-hole pairs. The hot carriers are injected into grain boundaries; therefore, grain boundary traps are created and result in the degradation of the on-current and mobility. With the continued scaling of modern complementary metal-oxide-semiconductor field-effect transistors (MOSFETs), classical bulk Si MOSFETs are approaching their fundamental limits. Germanium (Ge), which has high intrinsic carrier mobility, as a channel material with high-permittivity (high-κ) gate dielectric MOSFETs are attractive. Charge pumping techniques are extensively used to study the characteristics of interface traps and slow traps of Al2O3/GeO2/Ge n-MOSFETs. Under different fabrication processes, device with Al2O3 gate dielectric deposited by ALD with O3 as oxidant has lower trap density at the Ge/GeO2 interface compared to the one deposited with H2O as oxidant, so the higher mobility is obtained. Finally, positive bias temperature instability (PBTI) characteristics of Ge n-MOSFETs are investigated. The transfer characteristics and charge pumping results show that slow traps increase after stress and result in the degradation of the devices. The trap-depth profiles are also obtained by charge pumping techniques.

並列關鍵字

poly-Si TFTs ； grain boundary ； charge pumping ； Germanium

參考文獻

[1] J. Levinson, F. R. Shepherd, P. J. Scanlon, W. D. Westwood, G. Este, and M. Rider, “Conductivity behavior in polycrystalline semiconductor thin film transistors,” J. Appl. Phys., vol.53, no.2, pp.1193-1202, Feb. 1982.

[2] M. Koyanagi et al., “The Charge-Pumping Technique for Grain Boundary Trap Evaluation in Polysilicon TFT’s,” IEEE Electron Device Lett., vol.13, no.3, pp.152-154, Mar. 1992.

[3] G. W. Lee, J. W. Lee, and C. H. Han, “Substrate Resistance Effect on Charge-Pumping Current in Polycrystalline Silicon Thin Film Transistors,” Jpn. J. Appl. Phys., vol.38, Part 1, no.4B, pp.2656-2659, Apr. 1999.

[4] N. S. Saks, S. Batra, and M. Manning, “Charge Pumping in Thin Film Transistors,” Microelectronic Engineering, vol.28, pp.379-382, 1995.

[5] L. Pichon, A. Boukhenoufa, C.Cordier, and B. Cretu, “Determination of interface state distribution in polysilicon thin film transistors from low-frequency noise measurements：Application to analysis of electrical properties,” J. Appl. Phys., vol.100, no.5, pp.054504, Sep. 2006.

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電荷汲取技術於多晶矽薄膜電晶體及n型鍺通道金氧半場效電晶體之研究

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