- 學位論文
具熱感知功能之三維晶片內網路演算法與架構設計
Algorithms and Architectures of Thermal-Aware Three-Dimensional Network-on-Chip Systems
摘要
隨半導體製程的進步，單晶片平台的整合複雜度越來越高。對高效能的多處理器系統而言，晶片內網路已成為常用的資料交換架構。結合三維積體電路技術，三維晶片內網路系統具有的主要優勢包含構成尺度縮減與物理距離縮短帶來的低連線延遲、更高維度的可路由方向帶來的頻寬提升等，使晶片內網路系統可具備更高的傳輸效能。然而，過去在二維積體電路環境中，由於晶片內網路的高交換率特性，其對於晶片整體溫度的上升有不可忽視的影響，路由器更往往是熱點的來源之一。當晶片內網路系統建置在三維積體電路環境時，導因於功率密度的增加與各層散熱能力不同，其熱議題將比二維晶片內網路更加嚴重。也因此，晶片內網路的傳輸效能將會受到溫度限制而嚴重受限，使得三維整合帶來的好處被削減。 在本論文中，我們針對三維晶片內網路系統之溫度與效能議題，在高溫絕不超過溫度上限前提下，同樣散熱器配置環境中，以低成本架構與演算法方法達成網路效能之最大化。我們針對具備溫度感測器與不具溫度感測器之系統，提出不同的新式設計方法，改進既有方法之缺陷。在本論文第一部分中，我們首先提出一交通與熱交互耦合共同模擬環境，並與商用溫度模擬軟體進行準確度之驗證，提供熱感知功能三維晶片內網路設計與模擬之環境。 在本論文的第二部分中，我們為不具備嵌入式溫度感測器之三維晶片內網路系統，提出一基於路由方法達成交通遷移與緩衝器重配置之設計方法。由於三維晶片內網路系統在垂直方向上，各層的散熱條件不相同，傳統為二維晶片內網路設計的流量負載平衡設計方案，與溫度平衡設計方案皆難以達到吞吐量之最大化；透過重分配各層之負載流量與緩衝器深度，在不提升散熱器條件下，我們所提出的方法可對最大穩態吞吐量提升2.7% ~ 45.2%。 對於具備嵌入式溫度感測器之晶片內網路系統而言，由於三維晶片內網路之單位面積廢熱功耗增加，傳統二維晶片內網路所使用之全域交通節流技術將使得網路可用性大幅下降；而分散式交通節流技術又因為各層散熱條件不同，使得遠離散熱器之路由器難以有效降溫，造成節流時間過長。因此在本論文的第三部分中，我們提出一新式動態熱管理機制與系統交通與溫度控制框架；透過協作式路由器垂直節流技術，主動創造熱散逸通道。與傳統方法相比較，系統受熱管理機制造成之效能影響縮減至約1/12。 由於動態熱管理機制造成網格網路拓樸隨時間快速改變，傳統晶片內網路設計之路由方法將遭遇壅塞樹長時間大幅佔據可用通道之問題，使得資料交換成功率與網路吞吐量下降趨近於零。因此，在本論文的第四部份中，我們提出新式傳輸層協助路由方法，與其低成本之硬體架構。透過此方法，過去會被時變拓樸阻擋之封包將不再造成網路壅塞，使其餘可傳遞封包仍可維持正常傳輸。此方法與第三部分所提出之新式動特熱管理機制搭配，可將溫度控管於溫度限制之下，並使熱感知三維晶片內網路具備高吞吐量。 總結本論文所提出之設計方法，可降低三維晶片內網路較嚴重之熱挑戰，並減少傳輸效能受溫度限制而受限之問題，使得三維晶片內網路系統具備更高之傳輸效能。
並列摘要
As the advance of semiconductor technology, the integration complexities become higher. For high performance chip multi-processor systems, Network-on-Chip (NoC) has become a common infrastructure for data exchange. By combining with the three-dimensional (3D) IC technology, 3D NoC has the advantages of smaller form factor, leading to lower transmission latency. Besides, due to the extra directions for connection, the router has higher bandwidth. These advantages make 3D NoC capable of achieving higher performance. However, due to the characteristic of high switching activity, NoC has comparable thermal impact as processors, and routers is one of the sources generating thermal hotspots. Due to the longer heat conduction path, larger cross-sectional power density, and varying cooling efficiency of different layers, the thermal problem of 3D NoC is severer than 2D NoC. Therefore, the performance gain of 3D integration will be limited by the peak temperature and the thermal limit. In this dissertation, we aim at maximizing the throughput of the network by proposing new algorithm and architecture. The design constraint is that the peak temperature of the NoC should be under the thermal limit. In the first part of this dissertation, a traffic-thermal mutual-coupling co-simulation environment is proposed and validated. The proposed simulator enables the design of thermal-aware 3D NoC systems. In the second part of this dissertation, we propose a new routing-based traffic migration and buffer allocation design scheme for 3D NoC systems without embedded thermal sensors. Due to the varying cooling efficiency of the different layers, the traditional load-balancing design scheme and the traditional temperature-balancing design scheme for 2D NoC cannot achieve the maximal throughput. By redistributing the traffic loading and the buffer depth among each layer, the maximal throughput in steady state can be improved by 13.5% without upgrading heat dissipater. For 3D NoC with embedded thermal sensors, the traditional global-throttling-based run-time thermal management (RTM) scheme of 2D NoC results in huge degradation in network availability. Similarly, the traditional distributed-throttling-based RTM scheme suffers from the long cooling time. Therefore, we propose a new RTM scheme and a temperature-traffic control framework. The collaborative vertical-throttling-based RTM scheme actively creates the null region of heat generation for fast heat dissipation. Comparing to traditional RTM schemes, the performance impact of RTM is reduced to one-twelfth. Because traditional routing algorithms cannot handle the time-varying network topology resulting from RTM, the congestion-tree occupies the network, leading to poor throughput. Hence, in the fourth part of this dissertation, we propose the transport layer assisted routing scheme and the corresponding algorithms and architectures. With this scheme, all fail delivery cases are removed. Therefore, the 3D NoC can sustain its working status in high performance. In summary, the proposed schemes can mitigate the design challenge of 3D NoC systems. Under the same cooling device and environment, the 3D NoC system can be kept thermal-safe. Besides, the advantage of 3D integration, performance improvement, is preserved because the thermal-limited performance back-off is reduced.