以原子層沉積技術成長氮化二氧化鉿閘極介電層之金氧半電容元件之研究

Study of Metal-Oxide-Semiconductor Capacitors with Nitrided Hafnium Oxide Gate Dielectrics Grown by Atomic Layer Deposition

高同儀(Tung-Yi Kao)

指導教授 ： 陳敏璋

國立臺灣大學/工學院/材料科學與工程學研究所/碩士(2014年)

https://doi.org/10.6342/NTU.2014.11204

摘要

本論文使用原子層沉積技術(Atomic Layer Deposition, ALD)以及遠程電漿輔助原子層沉積技術(Remote Plasma Atomic Layer Deposition, RPALD)，沉積二氧化鉿(HfO2)薄膜作為MOS元件之閘極介電層，並比較使用這兩種方式所沉積的HfO2薄膜之品質。實驗顯示，以RPALD沉積之HfO2閘極介電層之電性表現較佳。此外，本論文更進一步探討HfO2閘極介電層經氮化處理後，氮原子在薄膜中之分布位置對電性的影響，，結果顯示對薄膜下半部進行氮化處理(Bottom Nitridation, BN)，使氮原子之位置靠近氧化層與矽基板之介面，HfO2閘極介電層電性表現較佳，其電容等效厚度(Capacitance Equivalent Thickness, CET)可達1.3nm，而介電係數可達16.48。此外，由於鰭式場效電晶體(FinFET)的發展日趨重要，因此同樣的實驗也在110方向之矽基板上進行，實驗結果之趨勢與沉積在100方向之矽基板相同，BN之電性表現較佳，CET可達1.33nm，介電係數可達16.45。本論文的最後一部分則研究利用RPALD技術沉積不同Hf/Zr比例之氧化鋯鉿(HfZrO)閘極介電層，結果顯示隨著Zr成分的上升，在退火後薄膜內形成正方晶相(tetragonal phase)的比例增加，因此提高介電係數，但漏電流密度也同時增加，而透過氮化處理可抑制漏電流密度，，其CET可達1.2nm，介電係數可達20.22，而漏電流密度為4.0x10-4A/cm2。

關鍵字

原子層沉積技術 ； 遠程電漿輔助原子層沉積技術 ； 二氧化鉿 ； 氧化鋯鉿 ； 金屬氧化物半導體 ； 高介電係數閘極介電層 ； 氨氣電漿處理

並列摘要

In the thesis, hafnium oxides (HfO2) gate dielectrics were deposited by thermal mode atomic layer deposition (ALD) and remote plasma atomic layer deposition (RPALD) as the gate dielectrics in metal-oxide-semiconductor (MOS) devices. The experimental result reveals that the electrical properties of HfO2 gate dielectrics prepared by RPALD is superior to that deposited by thermal mode ALD. The effect of nitridation treatment on the electrical properties of HfO2 gate dielectrics was further investigated, in which the nitridation treatments were performed on the top (TN) and bottom (BN) region of the HfO2 gate dielectrics, respectively. As compared with the TN samples, the BN samples exhibit a superior electrical properties, probably due to the suppressed interfacial layer.The capacitance equivalent thickness (CET) of 1.3nm and an effective dielectric constant of 16.48 was achieved in the BN samples. In addition, because the progress of FinFET is of major interest, the same experiments were also carried out on Si(110) substrate. Similar results were also obtained: the electrical properties of the BN samples are also better than those of the TN samples, with a low CET of 1.33 nm and an effective dielectric constant of 16.45 Finally, hafnium zirconium oxides (HfZrO) with different ratios of Hf:Zr were prepared by RPALD. The tetragonal crystalline phase was observed after the post-deposition annealing with an increase of the Zr composition. Thus the dielectric constant was enhanced but the leakage current density increased due to the crystalline gate dielectrics. Therefore, a further nitridation treatment was performed to suppress the leakage current density. As a result, a low CET of 1.2nm, a high effective dielectric constant of 20.22, and a low leakage current density of 4.0x10-4A/cm2 was reached in the HfZrO gate dielectrics.

並列關鍵字

atomic layer deposition(ALD) ； remote plasma atomic layer deposition(RPALD) ； hafnium oxide ； hafnium zirconium oxide ； metal oxide semiconductor (MOS) ； High-K dielectric ； remote NH3 plasma treatment

參考文獻

[1] C. Zhao, C. Z. Zhao, M. Werner, S. Taylor, and P. R. Chalker, “Advanced CMOS Gate Stack: Present Research Progress,” ISRN Nanotechnol., vol. 2012, pp. 1–35, 2012.

[2] D. Edenfeld, A. B. Kahng, M. Rodgers, and Y. Zorian, “2003 technology roadmap for semiconductors,” Computer, vol. 37, no. 1, pp. 47–56, 2004.

[3] S. H. Lo, D. A. Buchanan, Y. Taur, and W. I. Wang, “Quantum-mechanical modeling of electron tunneling current from the inversion layer of ultra-thin-oxide nMOSFET’s,” Electron Device Lett. IEEE, vol. 18, no. 5, pp. 209–211, 1997.

[4] M. Depas, B. Vermeire, P. W. Mertens, R. L. Van Meirhaeghe, and M. M. Heyns, “Determination of tunnelling parameters in ultra-thin oxide layer poly-Si/SiO2/Si structures,” Solid-State Electron., vol. 38, no. 8, pp. 1465–1471, Aug. 1995.

[5] J. Robertson, “High dielectric constant gate oxides for metal oxide Si transistors,” Rep. Prog. Phys., vol. 69, no. 2, pp. 327–396, Feb. 2006.