絕緣層上鍺(矽鍺)技術暨磊晶成長矽鍺奈米結構應用研究

Ge(SiGe)-on-Insulator Technology and SiGe Nanostructure Epitaxial Growth

余承曄(Cheng-Yeh Yu)

指導教授 ： 劉致為

國立臺灣大學/電機資訊學院/電子工程學研究所/博士(2006年)

https://doi.org/10.6342/NTU.2006.03022

摘要

本論文中，主要分為二大部份: 應用晶圓直接鍵結技術結合膜層轉移製程技術(亦稱為Smart-cut製程技術)之研究探討與應用發展，以及利用超高真空化學氣相沉積技術進行矽鍺奈米結構磊晶製程之研究。
首先，因Smart-Cut技術對於半導體異質材料結構設計具有高度彈性與可變化性，可整合異質材料之光電特性優點，因此在半導體產業應用上愈顯重要。本論文對於晶圓直接黏合技術及膜層轉移製程技術之基礎原理及各製程參數之影響，進行一全面且深入之介紹與探討。本論文中，我們進行晶圓直接鍵結製程，成功將矽晶圓與矽晶圓或矽晶圓與鍺晶圓鍵結起來。產生單一鍵結波向外擴散，避免同時產生多點鍵結波，可減少鍵結缺陷或空洞的產生。自行組裝建立非破壞性紅外線晶圓鍵結檢測系統，具有方便、富彈性、取得容易與成本低廉等優點。調整氫離子佈植劑量的多寡會影響裂離的溫度，而佈植的能量決定裂離的深度。經過高溫處理，原植入之氫離子層會受高溫產生聚合作用，在植入深度處裂離。結合膜層轉移技術，成功製作絕緣層覆矽鍺(SiGe-on-Insulator)及絕緣層覆鍺(Ge-on-Insulator)等異質接面結構。
應變薄膜在高溫釋放應力之研究探討在奈米製程中非常重要。本論文利用硼磷矽玻璃(BPSG)在800℃以上高溫為半黏滯狀態之特性，在半導體基板上形成二維皺曲量子井層。在(001)矽晶圓上所形成之二維皺曲矽鍺層，其皺曲方向為相互垂直於<100>之二組方向，利用其規律結構，或可應用於光學應用上。由於SGOI基板上二維皺曲矽鍺層結構於低溫(10 K)時，可發現在波長為1.5μm處出現一訊號峰值，皺曲狀態可改變材料光學特性，因此有潛力發展為特殊光源之應用。本論文中所分析推導之皺曲相位圖，有益於應變薄膜釋放應力之設計。
純鍺材料在許多特性上如遷移率，較矽晶圓性質為佳，但由於鍺有嚴重之漏電問題，且由於鍺晶圓因自然界含量少而造成材料晶圓價格相當高，利用smart-cut製程技術，可製作絕緣鍺(GOI)晶圓，裂離之純鍺晶圓可回收再予重製利用，可同時克服此二大缺點。由於異質材料可能因為不同材料特性，如熱膨脹係數差異過大，而使得鍵結過程特性不如預期或造成缺陷過多。因此，為有效延伸異質晶圓材料鍵結應用，我們發展以150 oC低溫Smart-cut製程，成功獲得低溫製程GOI晶圓。因
有效抑制氫擴散，大幅降低表面粗糙度與缺陷密度，獲得較佳之材料特性，responsivity可由300 oC 製程之3.6 mA/W升高至220mA/W。
第二部份為利用超高真空化學氣相沉積技術進行矽鍺奈米結構磊晶製程之研究。由於製程腔體維持低於10-9 torr之超高真空之磊晶環境，而兼具有高潔淨度以及低溫製程(~500-600oC)兩項優點，因此是目前應用於磊晶成長各種矽鍺結構的主要方法之一。本論文利用矽與鍺材料之自然晶格常數差異，成長鍺濃度漸增厚膜層之矽鍺虛擬基板結構後，再磊晶一薄矽層，獲得雙軸之全面應變矽通道，在NMOSFET元件上提升~65 %載子遷移率。而利用成長(矽)鍺量子點結構調變基板材料之能帶，可藉以調變發光頻譜，應用在光偵測器與光電元件上。
最後，磊晶成長一超薄(~ 4 nm)之高濃度鍺量子井結構，由材料分析可確認鍺量子井層受到完全壓縮應變，並無缺陷存在或被發現。利用在鍺材料中載子有較高傳輸速率之特性，超薄之高濃度鍺量子井結構作為金氧半場效電晶體載子通道，可改善電晶體特性，在PMOSFET元件上，可獲得提升~3.2倍之載子遷移率及提升~3.2倍電流。

關鍵字

矽鍺技術 ； 晶圓鍵結 ； 鍵結檢測 ； 膜層轉移 ； 氫離子佈植 ； 異質材料 ； 皺曲矽鍺層 ； 絕緣層覆矽鍺 ； 絕緣層覆鍺 ； 超高真空化學氣相沉積 ； 矽鍺虛擬基板 ； 量子點 ； 量子井 ； 外加機械力 ； 應變矽技術。

並列摘要

In this thesis, the layer transfer techniques using wafer bonding and hydrogen implantation (also called smart-cut) have been studied. The fabrication and characterization of Ge-on-Insulator (GOI) and SiGe-on-Insulator (SGOI) structures are investigated. The ultra-high vacuum chemical vapor deposition (UHV/CVD) system is employed to epitaxial grow the SiGe nanostructures for optical and electrical applications.
First, hetero-material bonding have been investigated and demonstrated. Cleaning process employed prior to bonding must be able to remove contaminations and result in a dipole-dipole van der Waals attraction force for a good initial contact bond. High temperature treatment could strength the chemical bonds between the two wafers. It is important to establish a single bond front that propagates outward. Bonding integrities have been checked by transmission electron microscopy (TEM), breaking method and infrared transmission imaging system.
The implanted hydrogen ions would break the chemical bonds and passivated the internal surface. A high temperature treatment would lead to the nucleation and formation of the hydrogen-induced microcracks parallel to the bonding surface. Stringing up the microcracks would cause the splitting of the host wafer. The desired layer would be transferred to the handle wafer if the bonding procedure is accomplished before splitting. The layer transfer techniques involve chemical interactions of bond breaking and internal surface passivation, as well as physical interactions of gas coalescence, pressure, and fracture.
Strained thin-films on viscous layers are beneficial to engineering the elastic relaxation by viscous flow at high temperature. However, there are two possible relaxation mechanisms to relieve the stresses: in-plane expansion and buckling of the film. The characteristics of two-dimensional buckled SiGe layers have been investigated. A special 1.5 µm PL emission was observed from the buckled state, which is different from the unbuckled materials and can be potentially used as a light source. To approach in-plane expansion, patterning the strained films on reduced area can facilitate the in-
plane expansion. The semi-empirical analysis may be useful in designing devices and to obtain the functional dependence of the phase diagram in terms of Ge content and film thickness.
GOI MIS detectors were fabricated by wafer bonding and layer transfer techniques at ~150 °C: so far, a lowest GOI process temperature that has been reported. The surface roughness of GOI structure decreases as the process temperature decreases due to the suppression of hydrogen diffusion in the Ge, resulting in a smooth cleaved surface is obtained. The responsivity increases from 3.6 mA/W to 220 mA/W as the process temperature decreases from 300 °C to 150 °C, due to the suppression of defects. Low temperature bonding is thus a promising technique to provide GOI with low defect density for future electrical and optoelectronic applications.
The UHV/CVD technique could be used to successfully grow SiGe epi-layers at a low temperature (~500-600oC). The growth chamber is evacuated by turbo molecular pumps to keep in ultra-high vacuum of ~10-9 torr. Silane (SiH4) and germane (GeH4) were used as the precursors for Si1-xGex growth. Strained Si NMOSFET devices with a ~65 % effective electron mobility enhancement have been demonstrated on epitaxial SiGe virtual substrates. Growth of multi-layer Ge quantum dots under SK growth mode is self-assembled.
Finally, a ultra thin strained Ge quantum well channel (~ 4 nm) directly grown on Si substrate is demonstrated with low defect density and high hole mobility enhancement. The quantum well Ge channel reveals a ~3.2x current enhancement and a ~3.2x mobility enhancement as compared to the bulk Si PFET.

並列關鍵字

SiGe ； wafer bonding ； layer transfer ； hydrogen implant ； smart-cut ； Ge-on-Insulator (GOI) ； SiGe-on-Insulator (SGOI) ； buckling ； UHVCVD ； strained-Si ； quantum dot ； quantum well ； mechanical strain.

參考文獻

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