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  • 學位論文

應用於第五世代通訊系統之相位陣列關鍵元件與相位陣列之研究

Research on Key Components in Phased Array Systems and Phased Array System for The Fifth Generation Communication Using GaAs pHEMT Process

指導教授 : 林坤佑
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摘要


本論文主要分為三個部分,第一部分為毫米波四位元相移器,第二個部分為毫米波真實時間延遲(True time delay)放大器,及最後一個部分的毫米波相位陣列系統(Phased array system)。 第一部分是開關式相移器的研究。相移器為相位陣列系統的關鍵元件,本論文中,一樣使用0.15 微米的增強式砷化鎵假晶高速電子移動率電晶體製程並設計了一個4 位元的開關式相移器。此相移器藉由切換低通濾波器來達到相位移的效果,其特色為低相位移誤差及極小的布局面積。另外,亦製作了各級的測試電路來驗證模擬與量測的特性,並基於量測的結果來除錯及製作改良的版本,最終得到了不錯的結果。此外,為了方便系統整合,亦驗證了只有正偏壓(0.75 V)的量測結果。 第二部分是有關毫米波真實時間延遲放大器的研究。本論文使用了 0.15 微米的增強式(Enhancement mode)砷化鎵(GaAs)假晶高速電子移動率電晶體(pHEMT)製程設計了一個有效結合開關式電容與分佈式放大器(Distributed amplifier)的人造傳輸線(Artificial transmission line)來實現調整真實時間延遲的放大器。其優點保留 了分佈式架構的寬頻特性,在28GHz 至38GHz 能有2 到3.4 dB 的寬頻增益,並提供了最大2 皮秒(picosecond)的真實時間延遲。 第三部分則是應用於38GHz 的相位陣列系統,其關鍵元件皆由0.15 微的砷化鎵假晶高速電子移動率電晶體製程製作,並整合於印刷電路板(Printed circuit board)上。此相位陣列系統的相移機制便由第二部分所製作的相移器來實現。除了相位陣列之外,亦製作了各電路的測試板,藉此驗證各電路經由打線(Bonding wire)接合後的特性。為了方便控制相位陣列,亦設計了一個可以藉由現場可程式化邏輯閘陣列(Field Programmable Gate Array)實現的數位電路,此控制電路擁有極佳彈性與擴充,可針對不同陣列數的相位陣列系統進行修改。此論文將討論相位陣列系統的整合規劃,從板材層數設計、關鍵元件腳位的布局與繞線、鏈路預算、測試板設計、數位控制電路設計及量測規劃。

並列摘要


This thesis consists of three main parts, the first part is design of a 38 GHz switch type phase shifter, the second is a wideband true time delay amplifier, and the third part is the integration of a phased array system for 38 GHz. In the first part, some preparatory work is presented. According to the preparatory work, a 38 GHz 4-bit switch type phase shifter with compact layout area is presented. The phase shifter is implemented in 0.15 micron E-mode GaAs pHEMT. It achieves 6.47° RMS phase error, 1.21 dB RMS amplitude error, and 9.95 dB average insertion loss at 38 GHz. In the second part, a wideband true time delay amplifier is designed. The TTDA is fabricated in 0.15 micron E-mode GaAs pHEMT. This TTDA applied the topology of distributed amplifier to achieve wideband operation and switching capacitor to achieve tunable time delay. Its operation bandwidth can cover 28 GHz to 38 GHz. The average gain of the TTDA is 2.75 dB to 3.25 dB. The maximum true time delay is 2 ps at 38 GHz and the maximum phase shift is 27° at 38 GHz. In the third part, integration of a 38 GHz phased array front-end is design and presented. All of the circuits are fabricated in 0.15 micron E-mode GaAs pHEMT and are packaged in PCBs. The phase shifter of the phased array front-end is the phase shifter presented in chapter 2. All of the design process and system consideration including bondwire effect, link budget, and layout consideration, are demonstrated in this chapter.

參考文獻


Federal Communications Commission, GN Docket No. 14-177, 15 FCC Record 138A1, “Use of spectrum bands above 24 GHz for mobile radio services,” [Online].Available: https://docs.fcc.gov/public/attachments/DOC-355211A1.pdf.
[2] S. Shakib, M. Elkholy, J. Dunworth, V. Aparin and K. Entesari, “A wideband 28-GHz transmit–receive front-end for 5G handset phased arrays in 40-nm CMOS,” IEEE Transactions on Microwave Theory and Techniques, vol. 67, no. 7, pp. 2946-2963, July 2019.
[3] A. Hajimiri, H. Hashemi, A. Natarajan, X. Guan, A. Komijani,” Integrated phased array systems in silicon,” Proceedings of the IEEE, vol. 93, no. 9, pp. 1637-1655,
Sept. 2005.
[4] A. Hajimiri, A. Komijani, A. Natarajan, R. Chunara, X. Gaun and H. Hashemi, “Phased array systems in Silicon,” IEEE Communications Magazine, vol. 42, no. 8,

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