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  • 學位論文

挖槽電源面的補償設計

Compensation Design of split power plane

指導教授 : 黃天偉

摘要


當資料傳輸速率到達數個十億位元的範圍以上,在印刷電路板上,由於槽線所造成的不連續效應將不能再被忽略。為了要了解槽線所產生的接地雜訊對訊號完整度的影響,本論文先探討與分析槽線的不連續效應,再列舉四種訊號線經由槽線所引起的雜訊補償方法,以多開槽電路觀察多條槽線對訊號完整度的影響以及串音效應,最後再以不同類型傳輸線輸入第三章訊號線經由槽線所引起的雜訊補償方法,比較不同傳輸線輸入對抑制雜訊的情形。使用時域分析儀來做定性定量的量測與分析,由這些電路的量測結果可作為日後設計電路的依據。

關鍵字

訊號完整度 槽線

並列摘要


As the data rates increase into the multi-gigabit range, the effect of slot lines discontinuities on printed circuit board becomes non-negligible. In order to investigate the signal integrity issues due to the slot lines, this paper discusses and analysis the effect of slot lines discontinuities. Then list four kind of compensation of slot, and by the multi-slots circuit investigates signal integrity and crosstalk due to multi-slots. Some circuit boards have been fabricated and the time-domain reflection ( TDR ) instrument is employed to make qualitative and quantitatively comparison between measurement and analysis. These signal integrity issues can be better handled from the results of the above measurement.

並列關鍵字

signal integrity slot lines

參考文獻


[14] 吳凱斌,電源接地平面之模型化與接地雜訊抑制,碩士論文,國立臺灣大學電信工程學硏究所,2006.
[1] J. Choi, S. Chun, N. Na, M. Swaminathan, and L. Smith, “A methodology for the Placement and optimization of decoupling capacitors for gigahertz system,” Proceedings of the 13th International Conference on VLSI Design, 1998 Institute of Electrical and Electronics Engineers, Inc. All rights reserved.
[2] H. J. Liaw, and H. Merkelo, “Signal integrity issues at split ground and power planes,” Proceedings of 46th IEEE Electronic Components and Technology Conference, 1996,pp. 752-755.
[3] K. C. Gupta, R. Garg, and I. J. Bahl, Microstrip Lines and Slotlines, Artech House, Dedham, Mass., 1996.
[4] R. F. Harrington, Time-Harmonic Electromagnetic Fields , McGraw-Hill, 1961,pp.181∼186.

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