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  • 學位論文

SATA-I 展頻時脈產生器

Spread Spectrum Clock Generator for SATA-I

指導教授 : 李泰成

摘要


隨著對高速傳輸速率需求的不斷提升,高速時脈信號所產生的電磁干擾(Electro-Magnetic Interference, EMI)成為不容忽略的問題。Serial AT Attachment (Serial-ATA)成為一種普遍的外部儲存規格。用來解決電磁雜訊干擾的方法有幾種,其中以展頻的方式最有效、最易於實現。展頻技術對時脈信號的頻率做微調,使輸出信號的能量平均分散到可控制的小範圍內,降低各諧波在頻譜上相對應的能量峰值。 在本論文中,我們提出一個適用於Serial-ATA之展頻時脈產生器(Spread Spectrum Clock Generator, SSCG)。這展頻時脈產生器是對壓控震盪器的控制電壓調變,來達成展頻的效果。論文中我們實現了一個1.5 GHz,具有5000 ppm、33 kHz三角波調變的展頻時脈產生器。此展頻時脈產生器使用台積電0.35 um CMOS製程製造。在非展頻情況所量測到時脈jitter為87 ps。展頻模式下,頻譜上的時脈峰高能量降低了約23 dB,全部功率消耗65 mW。

並列摘要


As operating at high frequencies, currents and voltages present in the circuits and the signal traces lead to a great Electro-Magnetic Interference (EMI). Serial AT Attachment (Serial-ATA) is one of the popular external storage specifications. There are many methods to diminish EMI, and spread spectrum is the simplest and the most efficient one among these solutions. Spread spectrum slightly modulates the frequency of a clock signal, and spread it over a manageable bandwidth. Energy peaks at specific frequencies are diminished. In this thesis, we proposed a Spread Spectrum Clock Generator (SSCG). The spread spectrum function of the SSCG is achieved by modulating the control voltage of the VCO.The SSCG generates clocks at 1.5 GHz, a 5000 ppm down spread with a triangular waveform frequency modulation of 33 kHz. The circuit is fabricated with 0.35 um CMOS technology. The non-spread spectrum clocking has a measured jitter of 87 ps and the peak amplitude reduction is about 23 dB in spread spectrum mode. The total power consumption is 65 mW .

並列關鍵字

SSCG

參考文獻


[1] R. E. Best, “Phase-Locked Loops”, Second Ed., McGraw-Hill, 1993.
[2] B. Razavi,” Design of Analog CMOS Integrated Circuits”, McGraw-Hill, 2002.
[5] J. Y. Michel and C. Neron, “A Frequency Modulated PLL for EMI reduction in Embedded Application,” IEEE International ASIC/SOC Conference, vol. 12, pp. 362–365, Septemper, 1999.
[7] H. H. Chang, I. H. Hua, and S. I. Liu, “A Spread Spectrum Clock Generator with Triangular Modulation,” IEEE Journal of Solid-State Circuits, SC-38, pp. 673-676, April 2003.
[9] T. P. Kenny, T. A. D. Riley, N. M. Filiol, and M. A. Copeland, “Design and Realization of a Digital Delta-Sigma Modulator for Fractional-n Frequency Synthesis,” IEEE Transactions on Vehicular Technologies, March, 1999.

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