應用於次臨界電壓之新型低功耗靜態隨機存取記憶體架構

A New Ultra-Low-Power SRAM for Sub-threshold Voltage Operation

卓易霆(I-Ting Chuo)

指導教授 ： 楊維斌

淡江大學/工學院/電機工程學系碩士班/碩士(2013年)

https://doi.org/10.6846/TKU.2013.00047

摘要

在現今的醫療或可攜式電子產品中，為了延長電池使用的時間及其使用壽命，低功率消耗的系統晶片因應而生。而在系統晶片中，記憶體通常佔有較大的面積，所以記憶體功率消耗的大小，往往影響著整個系統晶片的功率消耗。因此，本論文主要是研發能在低供應電壓下操作之新型低功耗靜態隨機存取記憶體。使用次臨界電壓作為供應電壓直接大幅降低整體操作功率。

以整合於系統晶片之研製為考量，設計能應用於次臨界電壓之新型低功耗靜態隨機存取記憶體，完成整體SRAM的模擬與設計，再進行電路佈局與晶片製造，最後進行測試驗證。整體電路設計分為四個部份：一、記憶體單元電路架構設計，二、雙端記憶體單元寫入操作概念改變，三、新型預充電訊號產生器(Precharge Signal Generatorl：PSG)設計，四、次臨界電壓新型低功耗靜態隨機存取記憶體設計。結合以上四個步驟，目的在於設計出一個新型具可選擇性預充電機制之靜態隨機存取記憶體。

在本論文中的靜態隨機存取記憶體提出了不同於傳統操作方式的寫入操作概念，結合新型預充電系統以進一步的節省漏電流功率消耗，使其能夠應用於先進低功耗之系統晶片中。

關鍵字

次臨界 ； 靜態隨機存取記憶體

並列摘要

Order to extend the battery life of today's medical or portable electronic products, low power consumption SoC should be born. In SOC, the memory usually occupy a larger area, so the power consumption of memories, often affect the the power consumption of the entire SoC systems. Therefore, this paper is the development of low supply voltage operation of the new low-power static random access memory. Sub-threshold as the supply voltage directly significantly reduces the overall operation of power.

To integrate the system chip development in consideration, the design can be applied in sub-threshold voltage static random access memory, after complete the simulation and design, then layout and wafer fabrication, final accomplish testing and validation. Overall circuit design is divided into four parts: first, the memory cell circuit architecture design, second, differential-ended memory cell write operation conceptual change, third, new precharge signal generator (Precharge Signal Generator: PSG) design, final, new sub-threshold voltage low-power static random access memory designs. Combining these four steps, design a new mechanism of optional pre-charging the static random access memory.

In this paper, the SRAMs write operation concept is different from the traditional mode of operation, combined with a new precharge system to further savings in leakage power consumption so that it can be applied to advanced low-power SoC.

並列關鍵字

Ultra-Low Power ； SRAM ； Sub-threshold

參考文獻

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