基因演算加速器硬體實現及其在通訊與高速電路板之優化應用

The Hardware Implementation of Genetic Algorithm Accelerator and its Optimization Applications in Communication and High Speed Printed Circuit Board

周允仕(Yun-Hsih Chou)

指導教授 ： 李揚漢

淡江大學/工學院/電機工程學系博士班/博士(2009年)

https://doi.org/10.6846/TKU.2009.01187

摘要

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關鍵字

基因演算法 ； 封包排程 ； 高密度分波多工 ； 次通道化排程機制 ； 高速電路板 ； 電源系統阻抗 ； 電源雜訊 ； 介電係數 ； 耗損係數 ； 四分之一波長開路短枝共振腔

並列摘要

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並列關鍵字

Genetic Algorithm ； Packet Scheduling ； DWDM ； IEEE 802.16 ； Subchannelization Scheduling ； PCB ； Power Bus Impedance ； Ground Bounce ； FR4 ； Dielectric Constant ； Attenuation Constant ； Quarter-wavelength Open Stub Resonator

參考文獻

[3]. Yang-Han Lee, Yih-Guang Jan, Yun-Hsih Chou, Hsien-Wei Tseng, “The Hardware Design for a Genetic Algorithm Accelerator for Packet Scheduling Problems”, Tamkang Journal of Science and Engineering, Vol.11, No. 2, pp. 165 - 174, 2008.

[1]. J. Michael Johnson and Yahya Rahmat-Samii “Genetic Algorithms in Engineering Electromagnetics,” IEEE Antennas and Propagation Magazine, Vol. 39, No. 4, pp. 7 - 21, August 1997.

[2]. D. E. Goldberg, “Genetic Algorithms in Search, Optimization, and Machine Learning,” Addison-Wesley, Reading, MA, 1989.

[4]. Hsien-Wei Tseng, Yen-Hsih Chou, Ming-Hsueh Chuang, Yang-Han Lee, Shiann-Tsong Sheu, and Yih-Guang Jan, “Design and Implementation of Subchannelization Scheduler in IEEE 802.16 Broadband Wireless Access Systems,” Journal of the Chinese Institute of Engineers (JCIE), Vol. 31, No. 6, pp. 967 - 976, 2008.

[5]. Yun-Hsih Chou, Yang-Han Lee, Ming-Jer Jeng and Liann-Be Chang, “Optimizing Selective Decoupling Capacitors by Genetic Algorithm for Multiplayer Power Bus”, 7th WSEAS International Conference on SYSTEMS THEORY AND SCIENTIFIC COMPUTATION (ISTASC'07), Vouliagmeni Beach, Athens, Greece, August 24-26, 2007.