新型通道環境偵測及動態提早終止疊代之類比式最小和LDPC解碼器晶片設計

Chip Design of Analog Min-Sum LDPC Decoder Employing New Channel Environment Detection and Dynamic Early Termination

梁顥朧(Hao-Long Liang)

指導教授 ： 李文達

國立臺北科技大學/電資學院/電腦與通訊研究所/碩士(2014年)

https://doi.org/10.6841/NTUT.2014.00111

摘要

本論文提出一新型通道環境偵測及動態提早終止疊代之類比式最小和LDPC解碼器晶片設計。在作法上，我們先以最小和演算法為基礎並且透過H校驗矩陣(H-matrix)的判別來實現類比式終止疊代方法，接著藉由新型通道環境偵測功能可送一回授訊號給終止疊代機制，相較典型作法，本電路能自我調整動態疊代的時間，進而提升解碼資料吞吐量。模擬結果顯示，當平均資料吞吐量是63.1Mbps時，其能源效率值為16.8J/b。在驗證上，我們採用TSMC 0.18μm 1P6M CMOS製程實現該一新型解碼器，該一晶片電晶體數目為3183顆，面積不包含I/O Pad為0.054mm2。實驗結果顯示該一新型類比解碼器擁有極低的能源效率值和極低的晶片面積，可供運用於新型行動裝置及未來SoC系統上。

關鍵字

通道環境偵測 ； 終止疊代 ； 類比解碼器 ； LDPC

並列摘要

This thesis proposes an analog LDPC decoder employing new channel environment detection and dynamic early termination. It is based on the min-sum algorithm and by checking parity H-matrix to decide iteration termination. We also propose a new detection technique which can feedback an adaptive iteration time to stop iteration mechanism by channel environment detection. In comparison with traditional stop iteration, this technique can increase the decoding throughput effectively. Simulation results show that a very low energy efficiency 16.8pJ/b is obtained when throughput is 63.1Mbps. Finally, an analog low power min-sum LDPC decoder using proposed channel environment detection and dynamic early termination is implemented by TSMC 0.18μm 1P6M CMOS technology. The chip size is only 0.054mm2 without I/O pad and gate count is 3183. The proposed decoder has very low energy efficiency and low chip area characteristics which can be applied to the mobile devices and future SoC system.

並列關鍵字

Channel Environment Detection ； Early Termination ； Analog Decoder ； LDPC

參考文獻

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