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  • 學位論文

非接觸式感測系統設計

Design and Implementation of Contactless Sensor System

指導教授 : 邱弘緯
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摘要


本論文中我們共設計了四個電路,第一個電路是將低壓降線性穩壓器的設計自動化流程實現出來,自動化設計使用Cadence Spectre實現電路,再利用NeoCircuit最佳化,量測結果輸出電壓為3V,線性調節率為0.33%/V,負載調節率為40m%/mA,並由TSMC 0.35um 2P4M製程所實現,含I/O PAD面積為1.462×1.149mm2。 第二個電路是設計一個非接觸式感測系統,量測結果電子標籤晶片將接收13.56MHz的射頻訊號,並由LDO提供後級電路及溫度感測器工作電壓,再藉由串列匯流排介面之協定與感測器溝通進而得到正確的溫度資料,此晶片由TSMC 0.35um 2P4M製程所實現,含I/O PAD面積為1.461×1.5mm2。 第三個電路是設計一個以米勒電容為架構的壓控振盪器,當MOS閘極電壓改變時,米勒效應會改變其米勒電容的大小,因而改變振盪頻率,模擬結果為可調範圍為11.34~12.61GHz,相位雜訊為-97.94 dBc/Hz,FOM為-178.8dB,並由UMC 90nm 1P9M製程所實現,含I/O PAD面積為0.43×0.58mm2,第四個電路是以注入式鎖定架構設計應用於無線射頻辨識系統在超高頻及微波頻段上的除二除頻器,量測結果自振範圍為581MHz 808 MHz,相位雜訊為-126 dBc/Hz,當注入功率為0 dBm時,可除頻範圍為700MHz~2.7GHz,工作電壓1.3V下消耗功率約12.09 mW,並由TSMC 0.18um 1P6M製程所實現,含I/O PAD面積為1.05×0.64mm2。

並列摘要


In this thesis, we propose four circuits. In the first circuit, we propose the optimization method to design the low dropout regulator automatically. It also demonstrated successfully that a specified target for Low-Dropout Regulator. Measurement result of Vout is 3V, line regulation is 0.33%/V, load regulation is 40m%/mA, and implemented by TSMC 0.35um 2P4M process, and chip size is 1.462×1.149mm2. In the second circuit, we propose a contactless sensor system application for Serial Peripheral Interface, the tag chip will receive RF signal with 13.56MHz, and Low-Dropout Regulator to provide digital circuit and temperature sensor with power voltage, and the chip communicated and received the correct temperature information from sensor with SPI protocol, and implemented by TSMC 0.35um 2P4M process, and chip size is 1.461×1.5mm2. In the third circuit, we propose a Voltage-Controlled Oscillator takeing miller varactor, tunning range is from 11.34 to 12.61 GHz, phase noise @ 1MHz is -97.94dBc/Hz, and FOM is -178.8dB. It consumes power is about at 0.5V power supply, and implemented by UMC 90nm 1P9M process, and chip size is 0.43×0.58mm2.In the fourth circuit, we propose an Injection-Locked Freqency Divider application for RFID with UHF and Microwave band, the measurement results show that at the supply voltage of 1.3V, divider free-running from 581 to 808 MHz. At the injection power of 0 dBm, the locking range is about 2 GHz from the incident frequency 700 MHz to 2.7GHz, and free-running phase noise @ 1MHz is -126dBc/Hz, and consumes power is about 12.09 mW. It is implemented by TSMC 0.18um 1P6M process, and chip size is 1.05×0.64mm2.

參考文獻


[1]G. A. Rincon-Mora and P. E. Allen, “A Low-Voltage, Low Quiescent Current, Low Drop-Out Regulator,” IEEE Journal of Solid-State circuits, vol. 33, no. 1, pp. 36-44, Jan. 1998.
[2]A.C. Woerd, W.A. Serdijn, R. H. van Beynhem, and R. J. H. Janse, “Low-Power Current-Mode 0.9-V Voltage Regulator,” IEEE Journal of Solid-State circuits, vol. 29, no. 9, pp. 1138-1141, Sep. 1994.
[3]K. Nang Leung and P. K. T. Mok, “A Capacitor-Free CMOS Low-Dropout Regulator with Damping-Factor-Control Frequency Compensation,” IEEE Journal of Solid State Circuits, vol. 38, no. 10, pp. 1691-1702, Oct. 2003.
[4]K. Chun Kwok and P. K. T. Mok, “Pole-Zero Tracking Frequency Compensation for Low Dropout Regulator,” IEEE International Symposium on Circuits and Systems (ISCAS), vol. 4, pp. 735-738, May 2002.
[5]B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, Inc., 2001.

被引用紀錄


何儀修(2010)。無線充電系統與晶片設計〔碩士論文,國立臺北科技大學〕。華藝線上圖書館。https://www.airitilibrary.com/Article/Detail?DocID=U0006-2607201013534000

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