低功耗升頻混頻器與四相位壓控振盪器之設計

Design and Implementation of Low-Power Up-Conversion Mixer and Quadrature VCO

薛敬永(Ching-Yung Hsueh)

指導教授 ： 陳建中 ； 黃育賢

國立臺北科技大學/電資學院/電腦與通訊研究所/碩士(2013年)

摘要

本論文第一部分為操作在1.8 GHz ~ 2.0 GHz頻率之低功耗升頻混頻器。使用TSMC 90-nm 1P9M CMOS製程製作晶片。升頻混頻器為改良Gilbert-cell混頻器使電路可以達到低功耗並具有增益控制的功能。量測結果顯示在高增益與低增益模式下，轉換增益(Conversion Gain)分別為9.5/1 dB、輸入三階交互調變失真(IIP3)為0/7 dBm、RF輸出返回損耗(Return Loss)為-12 dB、功耗為2 mW、晶片面積含pad為0.708 mm^2。第二部分為正交調變器。模擬結果顯示在高增益與低增益模式下，轉換增益(Conversion Gain)分別為9/3.2 dB、輸入三階交互調變失真(IIP3)為-14/-8 dBm、RF輸出返回損耗(Return Loss)為-12 dB、功耗為4 mW。
本論文第三部分為操作在1.76 GHz ~ 2.69 GHz頻率之低功耗四相位壓控振盪器。使用TSMC 0.18-?m 1P6M CMOS製程製作晶片。四相位壓控振盪器採用交叉耦合差動對架構，並改良並聯型四相位壓控振盪器達到低相位雜訊。量測結果顯示頻率可調範圍(Tuning Range)為41 %、相位雜訊(Phase Noise)最佳為 -121 dBc/Hz、最大輸出功率(Output Power)為-3.5 dBm、功耗為10 mW、晶片面積含pad為0.5375 mm^2。第四部分為雙頻帶四相位壓控振盪器，量測頻帶分別為2.3 GHz~2.98 GHz與5.5 GHz~6.4 GHz。模擬結果顯示頻率可調範圍(Tuning Range)分別為25/15.8 %、相位雜訊(Phase Noise)最佳分別為 -122.6/-105.5 dBc/Hz、最大輸出功率(Output Power)為-8/-11dBm、功耗為6 mW、晶片面積含pad為0.781 mm^2。

關鍵字

低功耗 ； 升頻混頻器 ； 四相位壓控振盪器

並列摘要

This thesis-part I is a 1.8-2.0 GHz low-power up-conversion mixer in 90-nm CMOS technology. The modified circuit is based on Gilbert-cell double-balanced mixer for gain control and low power. The measured high and low conversion gains(CGs) are 9.5 dB and 1 dB, and corresponding input third order intercept point (IIP3) are 0 dBm and 7 dBm, respectively. The return loss is -12 dB and power consumption is 2 mW. The chip area is 0.708 mm^2 including PADs. This thesis-part II is IQ modulator. The simulated high and low conversion gains(CGs) are 9 dB and 3.2 dB, and corresponding input third order intercept point (IIP3) are -14 dBm and -8 dBm , respectively. The return loss is -12 dB and power consumption is 4 mW.
This thesis-part III is a 1.76-2.69GHz low-power Quadrature VCO in 0.18-?m CMOS technology. The modified circuit is based on parallel coupled QVCO for low phase noise. The measured tuning range is 41%, phase noise is -121 dBc/Hz, output power is -3.5 dBm and power consumption is 10 mW. The chip area is 0.5375 mm^2 including PADs. This thesis-part IV is a dual-band Quadrature VCO. The low and high band are 2.3-2.98 GHz and 5.5-6.4 GHz, respectively. The measured low-band tuning range is 25%, phase noise is -122.6 dBc/Hz, output power is -8 dBm. The measured high-band tuning range is 15.8%, phase noise is -105.5 dBc/Hz, output power is -11 dBm. The power consumption is 6 mW and chip area is 0.781 mm^2 including PADs.

並列關鍵字

Low-Power ； Up-Conversion Mixer ； Quadrature VCO

參考文獻

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