應用於數位相機之新式空間域色彩濾波陣列內插法及架構之硬體實現

Algorithm Design of Spatial Color Filter Array Demosaicking and Architecture Implementation

謝胤德(Yin-Te Hsieh)

指導教授 ： 范育成

國立臺北科技大學/電資學院/電腦與通訊研究所/碩士(2008年)

摘要

現代社會對於數位相機的需求與日俱增，除特定專業使用者外，消費者選購照相機時，因為數位相機以影像感測陣列（Image Sensor Array）與記憶體（Memory）各別取代了傳統底片的感光和儲存功能，而能隨時拍即時看、資料儲存與發送便利可靠等優勢，多以數位相機為首要選擇。
為降低成本與系統複雜度，許多數位相機使用彩色濾波陣列（Color Filter Array，CFA）對所攝景物進行取樣。經過取樣之影像資訊，則需要做恰當的色彩內插法（Interpolation / Demosaicking）影像還原處理後，才能呈現完整的影像。色彩內插影像還原處理的方法主要有兩個發展方向，一是注重效果，但會造成系統的高複雜度，另一是注重速度，同時卻必須對較低的影像品質妥協。
本論文之研究便是針對數位相機之影像色彩內插還原處理步驟，提出一個新的折衷辦法，使此一步驟的處理效果可以提升，而不需要花費大量的硬體成本與處理時間。
由實驗的結果，我們提出的演算法可以在以往的方法中，只加入一些精巧的比較功能而非複雜的運算，便可提供更加良好的影像品質。又因為運算簡單，在硬體的實現上也十分容易與快速，在眾多已提出的方法中，具有高度的競爭力。

關鍵字

色彩濾波陣列 ； 貝爾圖形 ； 影像內插法 ； 電路實現

並列摘要

Lower cost single-sensor digital imaging systems, such as commercial digital still cameras, mostly adopt a charge coupled device (CCD) or complementary metal oxide semiconductor (CMOS) image sensor array. A color filter array (CFA) deposited in a certain specified pattern on top of the pixel array to perform color imaging. Generally, the Bayer pattern is preferred for CFA. A color plane interpolation (or called demosaicking) is needed because the color information has been down-sampled by the CFA. If this estimation is carried out inappropriately, various visible artifacts will occur to the image.
Demosaicing is one of the image processes of reconstructing the missing colors in an image acquired from an image sensor through a color filter array. Since there are various demands, many different algorithms have been presented. Most methods perform reconstruction by detecting the edges of the objects in an image and then interpolated the missed pixels across the edge direction, called edge-oriented (or edge-adaptive) methods. In this paper, we describe the novel approach of edge-oriented method and constant-hue interpolation, which consider the diagonal edge information. We propose a better performance demosaicing algorithm which can be easily implemented as well.
The architecture design of our proposed algorithm is also described in this paper. We proposed a fast and cost-effective way to perform circuit implementation for CFA demosaicking.

並列關鍵字

Demosaicking ； CFA ； Bayer Pattern ； Architecture Design

參考文獻

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