形狀與尺寸可控制之導柱凸塊的形成方法

Method of Forming Pillar Bumps with Controllable Shape and Size

許后竣(Hou-Jun Hsu)

指導教授 ： 黃榮堂

國立臺北科技大學/機電學院/機電科技研究所/博士(2010年)

摘要

隨著電子行業的迅速發展更快，更小，更輕，更便宜的產品，覆晶封裝已被廣泛應用於微電子產品上。為了獲得可靠的覆晶封裝連結性，充分維持晶圓或晶片上電鍍後凸塊的共面度是非常重要。因此，本論文提出一種形狀與尺寸可控制之導柱凸塊的形成方法，係利用研磨平坦化的技術，可一次消除整片晶圓及晶粒上所有不同尺寸與/或形狀導柱凸塊間的差異，使所有導柱凸塊皆具有依照設計的尺寸與形狀。並發展出一以導柱凸塊封裝為基礎的低成本新型微機電元件封裝技術。

關鍵字

微電鑄 ； 研磨 ； 銅導柱凸塊

並列摘要

With the electronics industry advancing rapidly toward faster, smaller, lighter, and cheaper products, flip-chip packaging has been extensively used in microelectronics industries. To obtain a reliable interconnection of the flip-chip, it is very important to maintain adequate conplanarity of bumps that are plated on the wafer or chips. Therefore, this study proposes a method of forming pillar bumps with controllable shape and size, which use polishing planarization technology to eliminate shape difference among pillar bumps on a wafer and die, thus yield the pillar bumps with design shape and size. Finaly this thesis demostrates a low-cost and novel MEMS devices packaging technology based on the above developed controllable pillar bumps.

並列關鍵字

Micro-Electroformed ； Polishing ； Copper Pillar Bump

參考文獻

3. M. S. Shin, Y. H. Kim, “Microstucture Characaterization of Sn-Ag Solder Joints Between Stud Bμmps and Metal Pads”, Journal of Electronic Materials, Vol. 35, No. 12 pp. 1448-1454, 2003.

4. G. W. Xiao, P. C. H. Chan, A. Teng, J. Cai, M. M.F. Yuen, “Stud on Failure Mode of Solder Bμmp Fabricated Using Eutectic Solder Electroplating Process”, The 2nd IEEE International Conference on Electronic Materials and Packaging, pp. 18-26, 2000.

5. D. Gupta, F. Kalle, M. Fria, “Evaluation of a Low-Cost Colμmn Bμmp Technology for Fine Pitch Flip chip and WLP”, The 29th IEEE/CPMT/SEMI International Electronics Manufacturing Technology Symposiμm, pp. 18-21, 2004.

6. G. W. Xiao, J. F. Gong, W. C. Yau, C. H. Chan, S. W. Lee, M. F. Yuen, “Optimization of Electroplating, Stencil Printing, Ball Placement Solder-Bμmping Flip-Chip Process Technologies”, The 53rd IEEE Electronic Components and Technology Conference, pp. 1850-1855, 2003.

7. S. W. Jung, J. P. Jung, Y. Zhou, “Characteristics of Sn–Cu Solder Bμmp Formed by Electroplating for Flip Chip”, IEEE Transaction on Electronics Packaging Manufacturing, Vol. 29, No. 1, pp. 10-16, 2006.