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  • 學位論文

轉印以介電泳力排列改質化奈米碳管之技術研究

A Study of Transfer Printing of the Functionalized Carbon Nanotubes Aligned by Dielectrophoresis force

指導教授 : 黃榮堂

摘要


本論文研究奈米材料之轉印技術,將預先以介電泳力排序好的官能化奈米碳管轉移至以自我組裝單分子層改質的基材上。利用介電泳力操控奈米碳管控制其沉積位置為現今最常用來製作奈米尺度的電子元件的方法之一,然而在有工作電壓限制或有限工作面積的基材上,例如CMOS-MEMS元件,介電泳力操控並非有效的方法。因此本研究結合介電泳力操縱及轉印的方式,預期在有工作條件限制下的基材上完成奈米尺度電子元件的製作。實驗過程中,先以強氧化劑將奈米碳管作酸化處理,使羧酸官能基在碳管鍵結缺陷上產生。接著利用交流介電泳力操控排序官能化的奈米碳管,最後在分別針對三種不同轉印介質探討奈米碳管之轉印效果,是否能以正負電荷鍵結以達成轉印的目的。本研究成功完成以混合酸達到奈米碳管改質及純化的目的,並藉由IMHz頻率和15伏特的正弦交流訊號來排列奈米碳管,最後以三種不同轉印介質作轉印的探討。未來也希望將這低溫製備技術結合至和CMOS製程相容,成為量產奈米碳管元件技術之一。

並列摘要


The main purpose of this study aims to develop the technique that carbon nanotubes could be aligned by dielectrophoresis force (DEP) and transferred onto self-assembled monolayer (SAM) modified substrates. Also, several transferring media are studied in this study. Dielectrophoresis force (DEP) has been the most common way to manipulate Carbon nanotubes either multi walled carbon nanotbues (MWCNTs) or single walled carbon nanotubs (SWNTs) for the fabrication of nanoscale electronic devices, recently. Nevertheless, with limitation of substrate areas or the restriction of operation voltage of substrate, for example the chip with circuits based on CMOS-MEMS, dielectrophoresis force is not the best method to fabricate nanoscale devices. Therefore, we here demonstrate a novel method for the fabrication of the nanoscale devices based on CNTs. We first functionalize carbon nanotubes, and then combine transfer-printing mechanism with aligned carbon nanotubes by DEP process. In this work, we successfully perform SWNTs alignment on the micro scale parallel electrodes via DEP. Also, current-induced electrical breakdown is introduced to eliminate undesired type of SWNTs, which could improve the yield of nanoscale devices such as CNTFETs. Afterwards transferring the alignment of Carbon nanotubes by three different media is implemented to the functionalized gold electrodes and silicon wafers. By means of it, we can easily fabricate MOSFETs, Bio-sensors or Gas sensors based on CMOS-MEMS or where it is not appropriate to perform DEP to construct nanoscale devices in the future.

參考文獻


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