- 學位論文
100 MHz 10位元之數位發射機設計
Design of the 100 MHz 10 Bit Digital Transmitter
摘要
本論文旨在設計並製作一個工作電壓1.8 V，操作頻率100 MHz之CMOS數位發射機，主要包含有:10位元100 MHz之數位類比轉換器、一階低通濾波器與電流模式全差動線驅動器等單元，並採用TSMC 0.18 μm 1P6M CMOS製程技術來實現。 就數位類比轉換器而言，為了達到高速操作頻率的需求，故採用電流切換式之架構。但由於製程參數漂移的關係，會影響數位類比轉換器的精確度，故本論文參考一個電流源偏壓技巧，藉以改善臨界電壓漂移與電源導線壓降所造成的電流誤差，並應用於電流源的設計上。為了將數位電路之速度與複雜度、佈局面積及差動非線性誤差(Differential Nonlinearity Error)做最佳化之設計考量，本論文另採用一個等效於八位元之溫度計碼(Thermometer Code)解碼架構，並對電流源採用四象限對稱佈置，藉以消除線性和拋物線梯度誤差。 就線驅動器而言，為了得到較高的功率效益，必須由去除輸出阻抗匹配電阻與低電壓電路架構兩方面著手。在輸出阻抗匹配電阻的部份，採用合成(Synthesis)的方式，此合成電路能產生輸出阻抗匹配電阻，藉以降低電路的功率消耗、提升功率效益。在低電壓電路設計部份，將電路分別利用兩條不同的電壓源路徑來達成，避免電壓源路徑疊加，藉以實現低電壓的電路設計。此外，本論文進而利用濾波電容及對大寄生電容端點提供前饋的充放電路徑來解決AB類放大(Class-AB)的零交越失真問題，並於線驅動器後級加上電流迴授補償電路，以提高線性度。本線驅動器在1.8 V的供應電壓下，能驅動100 Ω輸出端負載，產生100 MHz、-48 dB THD與2 VPP的電壓訊號振幅。
並列摘要
This thesis presents the design and implementation of a 1.8 V, 100 MHz CMOS digital transmitter. The digital transmitter consists of a 10-bit 100 MHz digital-to-analog converter (DAC), a low-pass filter, and a fully differential current-mode line-driver, which has been fabricated with the TSMC 0.18 μm 1P6M CMOS technology. To increase the operating speed, the design digital-to-analog converter is based on the current-switch mode. Furthermore, we use a new current-source biasing technique to reduce the current error caused by inevitable threshold-voltage variation. It deserves noticing that the digital-to-analog converter consists of 8-bit thermometer-encoding and 2-bit binary-encoding. The goal is to achieve smaller layout area, to reduce the complexity of digital circuit, and to decrease the differential nonlinearity error (DNL). For the design of line driver, this thesis focuses on the impedance-matching scheme and low-voltage architecture to achieve high power efficiency. The utilization of impedance synthesis is to eliminate the matching resistor which works with extra power consumption. A low-voltage class-AB output structure is also demonstrated. Furthermore, the capacitive feedforward path is used to reduce the crossover distortion and the current-feedback circuit is added to line driver to increase linearity. The simulated results show that the output voltage swing of the line driver is 2 VPP. Over a 100 Ω differential load, and the THD is -48 dB with the operating frequency of 100 MHz at 1.8 V power supply.