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  • 學位論文

具有變頻與降相控制之交錯式功率因數修正器研製

Design and Implementation of an Interleaved Boost Power Factor Corrector with Variable-Frequency and Phase-Reduction Control

指導教授 : 歐勝源
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摘要


本論文之目的在設計與實現一具有高功因與低諧波、操作於連續導通模式之雙相交錯式功率因數修正器。雙相交錯式功率因數修正器不只具有傳統單相脈波寬度調變升壓型轉換器的優點,且在高輸出功率場合下更可改善功率元件高耐流、儲能電感體積過大與輸出電容過大等問題。 本論文實際製作一雙相交錯式功率因數修正器,以驗證論文中所提之分析與設計考量是否合理。控制電路使用德州儀器公司所生產的UC-3854AN控制IC以及使用單穩態多諧觸發IC HEF4528BP之相移控制電路,功率級採用兩組升壓型轉換器電路架構。再者,在所研製之控制架構中,尚具有變頻與降相控制功能;隨著負載變輕,控制電路會先調變切換頻率,負載越輕,則切換頻率越低。當負載降至某一臨界值時,則進行降相控制,藉以改善整體電路之效率。 本論文以輸入交流85~130 Vac,輸出360 W,輸出電流為0.9 A作為規格。當輕載操作時,降為單相動作且降低切換頻率以改善輕載效率,在滿載時功率因數可達0.99且效率可達90%以上。

並列摘要


This thesis focuses on the design and implementation of a two-phase interleaved boost power factor corrector (PFC) under continuous conduction mode to achieve high power factor and low input current harmonics. The implemented two-phase interleaved boost PFC features the advantages of the conventional single-phase PWM boost converter. In addition, the current ratings of the power switches, and the volumes of inductors and output capacitors can be improved. The variable-frequency and phase-reduction control is implemented in the control scheme in which the switching is modulated to be lower as the load changes to be lighter and the switching frequency higher as the load heavier. The used phase-reduction control is performed while the load reduces to be lighter than a predetermined threshold to improve the system efficiency further. A practice two-phase interleaved boost PFC is implemented in this thesis. Experiments are conducted and results are measured to confirm the effectiveness and the feasibility of the theoretical analysis and design. The control circuit uses UC-3854AN available from Texas Instruments and the associated mono-stable multi-vibrator HEF4528BP. The power stage consists of two Boost PFCs. The specifications of the implemented converter include input voltage 85~130Vac, maximum output power 360 W, and maximum output current 0.9A. Reducing to one phase and lowering switching frequency under light load conditions can improve the system efficiency. Experimental results show that efficiency is up 90% and power factor is up 0.99 under full load conditions.

參考文獻


[15] 施宏輝,定電流輸出之功率因數修正器研製,電力電子產業研發碩士專班,碩士學位論文,國立台北科技大學,電機工程系,台北,2008。
[16] 鄭有福,以UC3854A實現具有輸出電壓平衡控制之半橋式功率因數修正器,碩士學位論文,國立台北科技大學,電機工程系,台北,2009。
[19] 楊鎮豪,定電流輸出之交錯式功率因數修正器研製,碩士學位論文,國立台北科技大學,電機工程系,台北,2009。
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