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  • 學位論文

以鍵結圖結合虛擬電阻建模法解析開關時變電路之研究

Using Bond Graph Combined with the Modeling Virtual Resistor to Solve Time Variant Switching Circuit

指導教授 : 曾國雄
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摘要


本論文應用鍵結圖對開關元件進行建模,關於開關電路系統應用於鍵結圖建模之研究,過去文獻以能量切換結(Switched Power Junctions)來切換功率流之流向,或以調變式變換器(Modulated Transformer, MTF)內建數學方程式進行開關電路建模,而上述方法會有以下各種缺點:1.能量切換結與MTF難解決開關電路時變問題。2.能量切換結會產生兩種電路狀態,因此無法推導系統之轉移函數。3.系統零點與極點難以由能量切換結與MTF模型得知。這些方法都失去了鍵結圖的物理意義,為改善這些缺點,將開關上之電壓電流波形平均化,得到以電壓源、電流源與變壓器元件所組成的電路平均模型,此模型中電壓源及電流源皆包含小訊號成分,以虛擬電阻取代其小訊號來進行建模,並且透過鍵結圖之因果路徑與最短因果路徑,找出影響系統零點之元件。本論文以降壓型、升壓型及升降壓型三種基本轉換器為例,以鍵結圖配合虛擬電阻法進行建模,並透過因果路徑尋找應響系統零點之參數元件。使用虛擬電阻法有效解決開關元件應用於鍵結圖領域之問題,使模型更具有物理意義。使用鍵結圖建模法結合虛擬電阻的觀念有利於開關系統之分析,並且用鍵結圖之因果路徑與最短因果路徑可尋找系統之零點,遵循本論文所提出之方法將有利於往後開關電路之分析與設計。

並列摘要


This research attempts to model switch components based on bond graph. Past studies on this particular focus put emphasis on the direction of power flow controlled by Switched Power Junctions and switch modeling by mathematical formulas of Modulated Transformer (MTF). However, the above methods come with the following flaws: (1) Switched Power Junctions and Modulated Transformer cannot effectively solve time-dependent problem; (2) Switched Power Junctions generate two states where transfer function cannot be deduced; (3) system zeros and poles are hardly acquired through the model of Switched Power Junctions and Modulated Transformer. These mentioned methods do not realize the full utility of bond graph. In order to correct the flaws, voltage and current waveforms of switch are averaged to acquire the average circuit model, which is constructed by voltage source, current source, and transformer components. The voltage source and current source in this model all include small-signal, which is replaced by virtual resistance for modeling. Components that affect zeros are found through casual path and the shortest casual path on bond graph. This research takes three basic converters - buck, boost, and buck-boost - as example. The modeling is based on bond graph and virtual resistance; parameters that affect zeros are found through casual path. Virtual resistance is used to effectively solve problems resulting from switch components that are applied in bond graph, making the model more significant. Combined with virtual resistance, modeling based on bond graph can benefit the analysis of switch system. Founded on this modeling and system zeros that are found by using casual path and the shortest casual path, the methodology proposed in this research will benefit future analysis and design of switch circuits.

參考文獻


[32] 張拓文,以鍵結圖法進行切換式系統電路之模擬研究,碩士論文,國立臺北科技大學電機工程系,臺北,2007。
[2] Keyue Ma Smedley, Control art of switching converters, Dissertation (Ph.D.) , Thesis, California Institute of Technology, Pasadena, California, 1991.
[4] D. Geoff Rideout and Kazi T. Haq, "Active Modeling: A Method for Creating and SimulatingVariable-Complexity Models, " Journal of Dynamic Systems, vol. 132, 2010,
[7] Ruey-Fong Chang, Wen-Shiow Kao, Chen-Wei Chang, Kuo-Hsiung Tseng, and Shih-Ying Huang, "A Novel Structural Modeling and Analysis of VLSI Interconnect with an RLC Tree Network System using a BG/SEBD Approach," Science in China Series F- Information Sciences, Vol.54, Issue 9, pp. 1968-1985, 2011.
[8] Kuo-Hsiung Tseng, Ruey-Fong Chang, Yu-Shu Feng, Chun-Da Wu, Yu-Ting Yeh, Fa-Yen Tseng, and Wen-Shiow Kao, "Structural Modeling and Time-Domain Analysis of An L-Type Power Cable Circuit Using Bond Graph/SEBD Approach," International Journal of Electrical Engineering,Vol.16, No.5, pp. 377-391, 2009.

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